From 6598241f2c188ba6f4ce035d9e1fbdd4619c7e00 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Tue, 25 Sep 2012 11:49:40 -0500 Subject: sim: Move CPU-specific methods from SimObject to the BaseCPU class --- src/cpu/BaseCPU.py | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/cpu/BaseCPU.py') diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index c27fd1c27..6e5f6ff1a 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -77,6 +77,22 @@ class BaseCPU(MemObject): type = 'BaseCPU' abstract = True + @classmethod + def export_method_cxx_predecls(cls, code): + code('#include "cpu/base.hh"') + + + @classmethod + def export_methods(cls, code): + code(''' + void switchOut(); + void takeOverFrom(BaseCPU *cpu); +''') + + def takeOverFrom(self, old_cpu): + self._ccObject.takeOverFrom(old_cpu._ccObject) + + system = Param.System(Parent.any, "system object") cpu_id = Param.Int(-1, "CPU identifier") numThreads = Param.Unsigned(1, "number of HW thread contexts") -- cgit v1.2.3