From 8adc6781bf5741cca9a27e9e2c523b4def5a3bc3 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 13 Oct 2011 02:22:23 -0700
Subject: X86: Turn on the page table walker in SE mode.

---
 src/cpu/BaseCPU.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/cpu/BaseCPU.py')

diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 6640f3cea..430356004 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -140,7 +140,8 @@ class BaseCPU(MemObject):
     tracer = Param.InstTracer(default_tracer, "Instruction tracer")
 
     _cached_ports = []
-    if buildEnv['TARGET_ISA'] in ['x86', 'arm'] and buildEnv['FULL_SYSTEM']:
+    if buildEnv['TARGET_ISA'] == 'x86' or \
+        (buildEnv['TARGET_ISA'] == 'arm' and buildEnv['FULL_SYSTEM']):
         _cached_ports = ["itb.walker.port", "dtb.walker.port"]
 
     _uncached_ports = []
-- 
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