From d0a43ce2b29da1640248a756dcd07f0f28561df0 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 12 Oct 2008 14:01:06 -0700 Subject: X86: Fix the ordering of special physical address ranges. --- src/cpu/BaseCPU.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/BaseCPU.py') diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index 51d447f0b..ef9b54f3f 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -97,7 +97,7 @@ class BaseCPU(MemObject): dtb = Param.X86DTB(X86DTB(), "Data TLB") itb = Param.X86ITB(X86ITB(), "Instruction TLB") if build_env['FULL_SYSTEM']: - _localApic = X86LocalApic(pio_addr=0xa000000000000000) + _localApic = X86LocalApic(pio_addr=0x2000000000000000) interrupts = \ Param.X86LocalApic(_localApic, "Interrupt Controller") elif build_env['TARGET_ISA'] == 'mips': -- cgit v1.2.3