From ee62a0fec8e63f45f816c61ab9fb28aba7414185 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 11 Aug 2008 12:22:16 -0700 Subject: params: Convert the CPU objects to use the auto generated param structs. A whole bunch of stuff has been converted to use the new params stuff, but the CPU wasn't one of them. While we're at it, make some things a bit more stylish. Most of the work was done by Gabe, I just cleaned stuff up a bit more at the end. --- src/cpu/base.hh | 40 ++++++---------------------------------- 1 file changed, 6 insertions(+), 34 deletions(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index bdc7d7c8b..6e9e1dc39 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -45,6 +45,7 @@ #include "arch/interrupts.hh" #endif +class BaseCPUParams; class BranchPred; class CheckerCPU; class ThreadContext; @@ -162,40 +163,9 @@ class BaseCPU : public MemObject ThreadContext *getContext(int tn) { return threadContexts[tn]; } public: - struct Params - { - std::string name; - int numberOfThreads; - bool deferRegistration; - Counter max_insts_any_thread; - Counter max_insts_all_threads; - Counter max_loads_any_thread; - Counter max_loads_all_threads; - Tick clock; - bool functionTrace; - Tick functionTraceStart; - System *system; - int cpu_id; - Trace::InstTracer * tracer; - - Tick phase; -#if FULL_SYSTEM - Tick profile; - - bool do_statistics_insts; - bool do_checkpoint_insts; - bool do_quiesce; -#endif - Tick progress_interval; - BaseCPU *checker; - - TheISA::CoreSpecific coreParams; //ISA-Specific Params That Set Up State in Core - - Params(); - }; - - const Params *params; - + typedef BaseCPUParams Params; + const Params *params() const + { return reinterpret_cast(_params); } BaseCPU(Params *params); virtual ~BaseCPU(); @@ -221,6 +191,8 @@ class BaseCPU : public MemObject */ int number_of_threads; + TheISA::CoreSpecific coreParams; //ISA-Specific Params That Set Up State in Core + /** * Vector of per-thread instruction-based event queues. Used for * scheduling events based on number of instructions committed by -- cgit v1.2.3 From 8d018aef0f9de7129a77172a4164f36b2b093be6 Mon Sep 17 00:00:00 2001 From: Richard Strong Date: Mon, 18 Aug 2008 10:50:58 -0700 Subject: Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its python type of a latency. In addition, the multiple definitions of profile in the different cpu models caused problems for intialization of the interval value. If a child class's profile value was defined, the parent BaseCPU::ProfileEvent interval field would be initialized with a garbage value. The fix was to remove the multiple redifitions of profile in the child CPU classes. --- src/cpu/base.hh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 6e9e1dc39..251adc1b7 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -122,10 +122,10 @@ class BaseCPU : public MemObject { private: BaseCPU *cpu; - int interval; + Tick interval; public: - ProfileEvent(BaseCPU *cpu, int interval); + ProfileEvent(BaseCPU *cpu, Tick interval); void process(); }; ProfileEvent *profileEvent; -- cgit v1.2.3 From e06321091d4e931ff1a4d753e56d76f9746c3cd2 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 9 Oct 2008 04:58:24 -0700 Subject: eventq: convert all usage of events to use the new API. For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5. --- src/cpu/base.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 251adc1b7..c2b78a675 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -65,7 +65,7 @@ class CPUProgressEvent : public Event BaseCPU *cpu; public: - CPUProgressEvent(EventQueue *q, Tick ival, BaseCPU *_cpu); + CPUProgressEvent(BaseCPU *_cpu, Tick ival); void process(); -- cgit v1.2.3 From 0c3848732ee33cf14a80129f6cf7ee84d51c8bfb Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 11 Oct 2008 16:13:58 -0700 Subject: CPU: Add a getInterruptController function --- src/cpu/base.hh | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index c2b78a675..7b7ad9be0 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -110,6 +110,12 @@ class BaseCPU : public MemObject TheISA::Interrupts interrupts; public: + TheISA::Interrupts * + getInterruptController() + { + return &interrupts; + } + virtual void post_interrupt(int int_num, int index); virtual void clear_interrupt(int int_num, int index); virtual void clear_interrupts(); -- cgit v1.2.3 From c4f1cc3b482311f878be44259125c9a5b90c0569 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 12 Oct 2008 08:24:09 -0700 Subject: CPU: Eliminate the get_vec function. --- src/cpu/base.hh | 1 - 1 file changed, 1 deletion(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 7b7ad9be0..c99efa834 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -119,7 +119,6 @@ class BaseCPU : public MemObject virtual void post_interrupt(int int_num, int index); virtual void clear_interrupt(int int_num, int index); virtual void clear_interrupts(); - virtual uint64_t get_interrupts(int int_num); bool check_interrupts(ThreadContext * tc) const { return interrupts.check_interrupts(tc); } -- cgit v1.2.3 From d9f9c967fbe651e09d444e460a9b1c5a450b1cd2 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 12 Oct 2008 09:09:56 -0700 Subject: Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. --- src/cpu/base.hh | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index c99efa834..a12c98ab0 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -107,13 +107,13 @@ class BaseCPU : public MemObject protected: // uint64_t interrupts[TheISA::NumInterruptLevels]; // uint64_t intstatus; - TheISA::Interrupts interrupts; + TheISA::Interrupts * interrupts; public: TheISA::Interrupts * getInterruptController() { - return &interrupts; + return interrupts; } virtual void post_interrupt(int int_num, int index); @@ -121,7 +121,7 @@ class BaseCPU : public MemObject virtual void clear_interrupts(); bool check_interrupts(ThreadContext * tc) const - { return interrupts.check_interrupts(tc); } + { return interrupts->check_interrupts(tc); } class ProfileEvent : public Event { -- cgit v1.2.3 From 2736086d7c67a24d9eb87827a22a2b352e342ba2 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 12 Oct 2008 15:59:21 -0700 Subject: CPU: Create a microcode ROM object in the CPU which is defined by the ISA. --- src/cpu/base.hh | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index a12c98ab0..b0eece2a1 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -35,6 +35,7 @@ #include #include "arch/isa_traits.hh" +#include "arch/microcode_rom.hh" #include "base/statistics.hh" #include "config/full_system.hh" #include "sim/eventq.hh" @@ -103,6 +104,8 @@ class BaseCPU : public MemObject */ Tick nextCycle(Tick begin_tick); + TheISA::MicrocodeRom microcodeRom; + #if FULL_SYSTEM protected: // uint64_t interrupts[TheISA::NumInterruptLevels]; -- cgit v1.2.3 From 9836d81c2bba97e36c43ca22feee1d51a12ce6ac Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 21 Oct 2008 07:12:53 -0700 Subject: style: Use the correct m5 style for things relating to interrupts. --- src/cpu/base.hh | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index b0eece2a1..2d25c9e56 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -108,9 +108,7 @@ class BaseCPU : public MemObject #if FULL_SYSTEM protected: -// uint64_t interrupts[TheISA::NumInterruptLevels]; -// uint64_t intstatus; - TheISA::Interrupts * interrupts; + TheISA::Interrupts *interrupts; public: TheISA::Interrupts * @@ -119,12 +117,15 @@ class BaseCPU : public MemObject return interrupts; } - virtual void post_interrupt(int int_num, int index); - virtual void clear_interrupt(int int_num, int index); - virtual void clear_interrupts(); + virtual void postInterrupt(int int_num, int index); + virtual void clearInterrupt(int int_num, int index); + virtual void clearInterrupts(); - bool check_interrupts(ThreadContext * tc) const - { return interrupts->check_interrupts(tc); } + bool + checkInterrupts(ThreadContext *tc) const + { + return interrupts->checkInterrupts(tc); + } class ProfileEvent : public Event { -- cgit v1.2.3 From c55a467a06eaa59c47c52a2adddc266b8e545589 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Sun, 2 Nov 2008 21:56:57 -0500 Subject: make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered across the subclasses. generally make it so that member data is _cpuId and accessor functions are cpuId(). The ID val comes from the python (default -1 if none provided), and if it is -1, the index of cpuList will be given. this has passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard switch. --- src/cpu/base.hh | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 2d25c9e56..f39759605 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -80,8 +80,16 @@ class BaseCPU : public MemObject Tick clock; // @todo remove me after debugging with legion done Tick instCnt; + // every cpu has an id, put it in the base cpu + // Set at initialization, only time a cpuId might change is during a + // takeover (which should be done from within the BaseCPU anyway, + // therefore no setCpuId() method is provided + int _cpuId; public: + /** Reads this CPU's ID. */ + int cpuId() { return _cpuId; } + // Tick currentTick; inline Tick frequency() const { return Clock::Frequency / clock; } inline Tick ticks(int numCycles) const { return clock * numCycles; } -- cgit v1.2.3 From dd99ff23c6a71f7173014b5008d0cf12b7ef223a Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Tue, 4 Nov 2008 11:35:42 -0500 Subject: get rid of all instances of readTid() and getThreadNum(). Unify and eliminate redundancies with threadId() as their replacement. --- src/cpu/base.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index f39759605..83d73ede0 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -82,7 +82,7 @@ class BaseCPU : public MemObject Tick instCnt; // every cpu has an id, put it in the base cpu // Set at initialization, only time a cpuId might change is during a - // takeover (which should be done from within the BaseCPU anyway, + // takeover (which should be done from within the BaseCPU anyway, // therefore no setCpuId() method is provided int _cpuId; -- cgit v1.2.3 From f0fb3ac060234ed5860c8d5bca3e84dbd8d30c36 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 24 Jan 2009 07:27:21 -0800 Subject: cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep. Make interrupts use the new wakeup method, and pull all of the interrupt stuff into the cpu base class so that only the wakeup code needs to be updated. I tried to make wakeup, wakeCPU, and the various other mechanisms for waking and sleeping a little more sane, but I couldn't understand why the statistics were changing the way they were. Maybe we'll try again some day. --- src/cpu/base.hh | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 83d73ede0..c8215e047 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -125,9 +125,26 @@ class BaseCPU : public MemObject return interrupts; } - virtual void postInterrupt(int int_num, int index); - virtual void clearInterrupt(int int_num, int index); - virtual void clearInterrupts(); + virtual void wakeup() = 0; + + void + postInterrupt(int int_num, int index) + { + interrupts->post(int_num, index); + wakeup(); + } + + void + clearInterrupt(int int_num, int index) + { + interrupts->clear(int_num, index); + } + + void + clearInterrupts() + { + interrupts->clearAll(); + } bool checkInterrupts(ThreadContext *tc) const -- cgit v1.2.3 From cc95b5739097e31fdaa36a3ff443861969e338b1 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 5 Mar 2009 19:09:53 -0800 Subject: stats: Fix all stats usages to deal with template fixes --- src/cpu/base.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/base.hh') diff --git a/src/cpu/base.hh b/src/cpu/base.hh index c8215e047..8af3295eb 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -304,7 +304,7 @@ class BaseCPU : public MemObject public: // Number of CPU cycles simulated - Stats::Scalar<> numCycles; + Stats::Scalar numCycles; }; #endif // __CPU_BASE_HH__ -- cgit v1.2.3