From bd583d00f96cd6e8bb0669e2aacc9dfad1eda2b1 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Fri, 15 May 2015 13:39:53 -0400 Subject: misc: Appease gcc 5.1 Three minor issues are resolved: 1. Apparently gcc 5.1 does not like negation of booleans followed by bitwise AND. 2. Somehow the compiler also gets confused and warns about NoopMachInst being unused (removing it causes compilation errors though). Most likely a compiler bug. 3. There seems to be a number of instances where loop unrolling causes false positives for the array-bounds check. For now, switch to std::array. Potentially we could disable the warning for newer gcc versions, but switching to std::array is probably a good move in any case. --- src/cpu/base_dyn_inst.hh | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/cpu/base_dyn_inst.hh') diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index 50b1b12ce..5b54679c9 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -46,6 +46,7 @@ #ifndef __CPU_BASE_DYN_INST_HH__ #define __CPU_BASE_DYN_INST_HH__ +#include #include #include #include @@ -258,22 +259,22 @@ class BaseDynInst : public ExecContext, public RefCounted /** Flattened register index of the destination registers of this * instruction. */ - TheISA::RegIndex _flatDestRegIdx[TheISA::MaxInstDestRegs]; + std::array _flatDestRegIdx; /** Physical register index of the destination registers of this * instruction. */ - PhysRegIndex _destRegIdx[TheISA::MaxInstDestRegs]; + std::array _destRegIdx; /** Physical register index of the source registers of this * instruction. */ - PhysRegIndex _srcRegIdx[TheISA::MaxInstSrcRegs]; + std::array _srcRegIdx; /** Physical register index of the previous producers of the * architected destinations. */ - PhysRegIndex _prevDestRegIdx[TheISA::MaxInstDestRegs]; + std::array _prevDestRegIdx; public: -- cgit v1.2.3