From d4273cc9a6f3c00566e97ebcd71509ed14477b37 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Thu, 18 Jul 2013 08:31:16 -0400 Subject: mem: Set the cache line size on a system level This patch removes the notion of a peer block size and instead sets the cache line size on the system level. Previously the size was set per cache, and communicated through the interconnect. There were plenty checks to ensure that everyone had the same size specified, and these checks are now removed. Another benefit that is not yet harnessed is that the cache line size is now known at construction time, rather than after the port binding. Hence, the block size can be locally stored and does not have to be queried every time it is used. A follow-on patch updates the configuration scripts accordingly. --- src/cpu/base_dyn_inst.hh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/base_dyn_inst.hh') diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index 20278bd30..8989a438a 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 ARM Limited + * Copyright (c) 2011,2013 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -976,7 +976,7 @@ BaseDynInst::splitRequest(RequestPtr req, RequestPtr &sreqLow, RequestPtr &sreqHigh) { // Check to see if the request crosses the next level block boundary. - unsigned block_size = cpu->getDataPort().peerBlockSize(); + unsigned block_size = cpu->cacheLineSize(); Addr addr = req->getVaddr(); Addr split_addr = roundDown(addr + req->getSize() - 1, block_size); assert(split_addr <= addr || split_addr - addr < block_size); -- cgit v1.2.3