From 98cf57fb89b76a8ca423083d52cc647c7923fe51 Mon Sep 17 00:00:00 2001 From: Geoffrey Blake Date: Fri, 9 Mar 2012 09:59:28 -0500 Subject: CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU Making the CheckerCPU a runtime time option requires the code to be compatible with ISAs other than ARM. This patch adds the appropriate function stubs to allow compilation. --- src/cpu/checker/cpu_impl.hh | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) (limited to 'src/cpu/checker/cpu_impl.hh') diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh index 4f3fa34d2..167c3531f 100644 --- a/src/cpu/checker/cpu_impl.hh +++ b/src/cpu/checker/cpu_impl.hh @@ -44,6 +44,7 @@ #include #include +#include "arch/isa_traits.hh" #include "arch/vtophys.hh" #include "base/refcnt.hh" #include "config/the_isa.hh" @@ -201,9 +202,9 @@ Checker::verify(DynInstPtr &completed_inst) // maintain $r0 semantics thread->setIntReg(ZeroReg, 0); -#ifdef TARGET_ALPHA - thread->setFloatRegDouble(ZeroReg, 0.0); -#endif // TARGET_ALPHA +#if THE_ISA == ALPHA_ISA + thread->setFloatReg(ZeroReg, 0.0); +#endif // Check if any recent PC changes match up with anything we // expect to happen. This is mostly to check if traps or @@ -320,7 +321,9 @@ Checker::verify(DynInstPtr &completed_inst) thread->pcState(pcState); instPtr = thread->decoder.decode(newMachInst, pcState.instAddr()); - machInst = newMachInst; +#if THE_ISA != X86_ISA + machInst = newMachInst; +#endif } else { fetchDone = false; fetchOffset += sizeof(TheISA::MachInst); @@ -476,7 +479,11 @@ Checker::validateInst(DynInstPtr &inst) } } - MachInst mi = static_cast(inst->staticInst->machInst); + + MachInst mi; +#if THE_ISA != X86_ISA + mi = static_cast(inst->staticInst->machInst); +#endif if (mi != machInst) { panic("%lli: Binary instructions do not match! Inst: %#x, " -- cgit v1.2.3