From b5cf61efad0acab998b17623ebb00f67cb1f6d50 Mon Sep 17 00:00:00 2001
From: Kevin Lim <ktlim@umich.edu>
Date: Mon, 12 Jun 2006 19:11:38 -0400
Subject: Fixes for checker.  The RC/RS instructions check the interrupt flag,
 which isn't verifiable by the checker.

src/arch/alpha/isa/decoder.isa:
src/cpu/checker/cpu.cc:
    Fixes for checker.

--HG--
extra : convert_revision : b0ec8f3c4a10453a567cd6691283fc498403795e
---
 src/cpu/checker/cpu.cc | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/cpu/checker')

diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index ebc02f7be..b1167c1d8 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -84,6 +84,8 @@ CheckerCPU::CheckerCPU(Params *p)
 #else
     process = p->process;
 #endif
+
+    result.integer = 0;
 }
 
 CheckerCPU::~CheckerCPU()
-- 
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