From be28d96510e0e722db83b26f1a12d3f5de979b32 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Wed, 6 Apr 2016 19:43:31 +0100 Subject: Revert power patch sets with unexpected interactions The following patches had unexpected interactions with the current upstream code and have been reverted for now: e07fd01651f3: power: Add support for power models 831c7f2f9e39: power: Low-power idle power state for idle CPUs 4f749e00b667: power: Add power states to ClockedObject Signed-off-by: Andreas Sandberg --HG-- extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508 --- src/cpu/checker/cpu.cc | 4 ++-- src/cpu/checker/cpu_impl.hh | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src/cpu/checker') diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index 4d5919cdf..ac476e5f4 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -155,7 +155,7 @@ CheckerCPU::readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags) // Need to account for multiple accesses like the Atomic and TimingSimple while (1) { memReq = new Request(0, addr, size, flags, masterId, - thread->pcState().instAddr(), tc->contextId()); + thread->pcState().instAddr(), tc->contextId(), 0); // translate to physical address fault = dtb->translateFunctional(memReq, tc, BaseTLB::Read); @@ -243,7 +243,7 @@ CheckerCPU::writeMem(uint8_t *data, unsigned size, // Need to account for a multiple access like Atomic and Timing CPUs while (1) { memReq = new Request(0, addr, size, flags, masterId, - thread->pcState().instAddr(), tc->contextId()); + thread->pcState().instAddr(), tc->contextId(), 0); // translate to physical address fault = dtb->translateFunctional(memReq, tc, BaseTLB::Write); diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh index 5d5900aae..289861521 100644 --- a/src/cpu/checker/cpu_impl.hh +++ b/src/cpu/checker/cpu_impl.hh @@ -248,7 +248,8 @@ Checker::verify(DynInstPtr &completed_inst) sizeof(MachInst), 0, masterId, - fetch_PC, thread->contextId()); + fetch_PC, thread->contextId(), + unverifiedInst->threadNumber); memReq->setVirt(0, fetch_PC, sizeof(MachInst), Request::INST_FETCH, masterId, thread->instAddr()); -- cgit v1.2.3