From d0e4cdc9c36466a3dbef8c9f9f509cce8f1a6c34 Mon Sep 17 00:00:00 2001 From: Giacomo Gabrielli Date: Tue, 23 Oct 2018 13:51:52 +0100 Subject: cpu: Add a memory access predicate This changeset introduces a new predicate to guard memory accesses. The most immediate use for this is to allow proper handling of predicated-false vector contiguous loads and predicated-false micro-ops of vector gather loads (added in separate changesets). Change-Id: Ice6894fe150faec2f2f7ab796a00c99ac843810a Signed-off-by: Giacomo Gabrielli Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17991 Tested-by: kokoro Reviewed-by: Bradley Wang Reviewed-by: Nikos Nikoleris Maintainer: Nikos Nikoleris --- src/cpu/checker/cpu.hh | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'src/cpu/checker') diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh index 7582e5e59..8c3000005 100644 --- a/src/cpu/checker/cpu.hh +++ b/src/cpu/checker/cpu.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2016-2017 ARM Limited + * Copyright (c) 2011, 2016-2018 ARM Limited * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved * @@ -424,6 +424,18 @@ class CheckerCPU : public BaseCPU, public ExecContext thread->setPredicate(val); } + bool + readMemAccPredicate() const override + { + return thread->readMemAccPredicate(); + } + + void + setMemAccPredicate(bool val) override + { + thread->setMemAccPredicate(val); + } + TheISA::PCState pcState() const override { return thread->pcState(); } void pcState(const TheISA::PCState &val) override -- cgit v1.2.3