From 22c04190c607b9360d9a23548f8a54e83cf0e74a Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Mon, 12 Oct 2015 04:07:59 -0400
Subject: misc: Remove redundant compiler-specific defines

This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.
---
 src/cpu/decode_cache.hh | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

(limited to 'src/cpu/decode_cache.hh')

diff --git a/src/cpu/decode_cache.hh b/src/cpu/decode_cache.hh
index 34387419f..c451cbb69 100644
--- a/src/cpu/decode_cache.hh
+++ b/src/cpu/decode_cache.hh
@@ -31,9 +31,10 @@
 #ifndef __CPU_DECODE_CACHE_HH__
 #define __CPU_DECODE_CACHE_HH__
 
+#include <unordered_map>
+
 #include "arch/isa_traits.hh"
 #include "arch/types.hh"
-#include "base/hashmap.hh"
 #include "config/the_isa.hh"
 #include "cpu/static_inst_fwd.hh"
 
@@ -46,7 +47,7 @@ namespace DecodeCache
 {
 
 /// Hash for decoded instructions.
-typedef m5::hash_map<TheISA::ExtMachInst, StaticInstPtr> InstMap;
+typedef std::unordered_map<TheISA::ExtMachInst, StaticInstPtr> InstMap;
 
 /// A sparse map from an Addr to a Value, stored in page chunks.
 template<class Value>
@@ -58,7 +59,7 @@ class AddrMap
         Value items[TheISA::PageBytes];
     };
     // A map of cache pages which allows a sparse mapping.
-    typedef typename m5::hash_map<Addr, CachePage *> PageMap;
+    typedef typename std::unordered_map<Addr, CachePage *> PageMap;
     typedef typename PageMap::iterator PageIt;
     // Mini cache of recent lookups.
     PageIt recent[2];
@@ -75,7 +76,7 @@ class AddrMap
 
     /// Attempt to find the CacheePage which goes with a particular
     /// address. First check the small cache of recent results, then
-    /// actually look in the hash_map.
+    /// actually look in the hash map.
     /// @param addr The address to look up.
     CachePage *
     getPage(Addr addr)
-- 
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