From a8b2d66661e4be7cf5d5856f75f3f0e7849c5a9f Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Mon, 8 Jan 2007 17:11:10 -0500 Subject: change when legion-lock causes the simulation to die. It now happens after two consuctive differences since we compare stuff at slightly different times interrupts are seen the cycle before they happen in m5 so the pc gets changed early. --HG-- extra : convert_revision : f237363eababb2aad67e5b41670cf40be048a042 --- src/cpu/exetrace.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/cpu/exetrace.cc') diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc index 352a11958..6e0bf6d33 100644 --- a/src/cpu/exetrace.cc +++ b/src/cpu/exetrace.cc @@ -609,7 +609,8 @@ Trace::InstRecord::dump(ostream &outs) diffcount++; if (diffcount > 2) fatal("Differences found between Legion and M5\n"); - } + } else + diffcount = 0; compared = true; shared_data->flags = OWN_LEGION; -- cgit v1.2.3 From d6c92cdb3c9a8e13fddb58c89f13daac34390522 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Tue, 16 Jan 2007 19:08:21 -0500 Subject: Fix legion lock code a bit so that if we jump out of a micro coded instruction (because of a fault on the first op) we don't lose sync with legion Only print TLB if there is a tlb difference --HG-- extra : convert_revision : f3baf667ca466d6b8efcaccd186ecec14498229d --- src/cpu/exetrace.cc | 54 ++++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 15 deletions(-) (limited to 'src/cpu/exetrace.cc') diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc index 6e0bf6d33..87075c1ec 100644 --- a/src/cpu/exetrace.cc +++ b/src/cpu/exetrace.cc @@ -59,6 +59,7 @@ using namespace TheISA; #if THE_ISA == SPARC_ISA && FULL_SYSTEM static int diffcount = 0; +static bool wasMicro = false; #endif namespace Trace { @@ -124,6 +125,7 @@ inline void printLevelHeader(ostream & os, int level) void Trace::InstRecord::dump(ostream &outs) { + DPRINTF(Sparc, "Instruction: %#X\n", staticInst->machInst); if (flags[PRINT_REG_DELTA]) { #if THE_ISA == SPARC_ISA @@ -315,6 +317,24 @@ Trace::InstRecord::dump(ostream &outs) bool diffTlb = false; Addr m5Pc, lgnPc; + // We took a trap on a micro-op... + if (wasMicro && !staticInst->isMicroOp()) + { + // let's skip comparing this cycle + while (!compared) + if (shared_data->flags == OWN_M5) { + shared_data->flags = OWN_LEGION; + compared = true; + } + compared = false; + wasMicro = false; + } + + if (staticInst->isLastMicroOp()) + wasMicro = false; + else if (staticInst->isMicroOp()) + wasMicro = true; + if(!staticInst->isMicroOp() || staticInst->isLastMicroOp()) { while (!compared) { @@ -587,24 +607,28 @@ Trace::InstRecord::dump(ostream &outs) << endl;*/ } } - printColumnLabels(outs); - char label[8]; - for (int x = 0; x < 64; x++) { - if (shared_data->itb[x] != ULL(0xFFFFFFFFFFFFFFFF) || - thread->getITBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) { - sprintf(label, "I-TLB:%02d", x); - printRegPair(outs, label, thread->getITBPtr()->TteRead(x), shared_data->itb[x]); + if (diffTlb) { + printColumnLabels(outs); + char label[8]; + for (int x = 0; x < 64; x++) { + if (shared_data->itb[x] != ULL(0xFFFFFFFFFFFFFFFF) || + thread->getITBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) { + sprintf(label, "I-TLB:%02d", x); + printRegPair(outs, label, thread->getITBPtr()->TteRead(x), + shared_data->itb[x]); + } } - } - for (int x = 0; x < 64; x++) { - if (shared_data->dtb[x] != ULL(0xFFFFFFFFFFFFFFFF) || - thread->getDTBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) { - sprintf(label, "D-TLB:%02d", x); - printRegPair(outs, label, thread->getDTBPtr()->TteRead(x), shared_data->dtb[x]); + for (int x = 0; x < 64; x++) { + if (shared_data->dtb[x] != ULL(0xFFFFFFFFFFFFFFFF) || + thread->getDTBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) { + sprintf(label, "D-TLB:%02d", x); + printRegPair(outs, label, thread->getDTBPtr()->TteRead(x), + shared_data->dtb[x]); + } } + thread->getITBPtr()->dumpAll(); + thread->getDTBPtr()->dumpAll(); } - thread->getITBPtr()->dumpAll(); - thread->getDTBPtr()->dumpAll(); diffcount++; if (diffcount > 2) -- cgit v1.2.3