From 0c6a679359fa84060b5bc745a737073890d2fb90 Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Fri, 4 Feb 2011 00:08:18 -0500 Subject: inorder: stage width as a python parameter allow the user to specify how many instructions a pipeline stage can process on any given cycle (stageWidth...i.e.bandwidth) by setting the parameter through the python interface rather than compile the code after changing the *.cc file. (we always had the parameter there, but still used the static 'ThePipeline::StageWidth' instead) - Since StageWidth is now dynamically defined, change the interstage communication structure to use a vector and get rid of array and array handling index (toNextStageIndex) since we can just make calls to the list for the same information --- src/cpu/inorder/pipeline_traits.hh | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'src/cpu/inorder/pipeline_traits.hh') diff --git a/src/cpu/inorder/pipeline_traits.hh b/src/cpu/inorder/pipeline_traits.hh index 7abfc9a81..df964e254 100644 --- a/src/cpu/inorder/pipeline_traits.hh +++ b/src/cpu/inorder/pipeline_traits.hh @@ -52,7 +52,6 @@ namespace ThePipeline { // Pipeline Constants const unsigned NumStages = 5; const ThreadID MaxThreads = 8; - const unsigned StageWidth = 1; const unsigned BackEndStartStage = 2; // List of Resources The Pipeline Uses @@ -71,19 +70,6 @@ namespace ThePipeline { FetchBuff2 }; - // Expand this as necessary for your inter stage buffer sizes - static const unsigned interStageBuffSize[] = { - StageWidth, /* Stage 0 - 1 */ - StageWidth, /* Stage 1 - 2 */ - StageWidth, /* Stage 2 - 3 */ - StageWidth, /* Stage 3 - 4 */ - StageWidth, /* Stage 4 - 5 */ - StageWidth, /* Stage 5 - 6 */ - StageWidth, /* Stage 6 - 7 */ - StageWidth, /* Stage 7 - 8 */ - StageWidth /* Stage 8 - 9 */ - }; - typedef InOrderCPUParams Params; typedef RefCountingPtr DynInstPtr; -- cgit v1.2.3