From 1c7e988272efead94d2cfbe3fd65ba454d3e1fc1 Mon Sep 17 00:00:00 2001
From: Korey Sewell <ksewell@umich.edu>
Date: Tue, 12 May 2009 15:01:15 -0400
Subject: inorder-mem: skeleton support for prefetch/writehints

---
 src/cpu/inorder/resources/tlb_unit.hh | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/cpu/inorder/resources/tlb_unit.hh')

diff --git a/src/cpu/inorder/resources/tlb_unit.hh b/src/cpu/inorder/resources/tlb_unit.hh
index b0cdac2a2..67e1bda1d 100644
--- a/src/cpu/inorder/resources/tlb_unit.hh
+++ b/src/cpu/inorder/resources/tlb_unit.hh
@@ -112,6 +112,10 @@ class TLBUnitRequest : public ResourceRequest {
             flags = inst->getMemFlags();
         }
 
+        if (req_size == 0 && (inst->isDataPrefetch() || inst->isInstPrefetch())) {
+            req_size = 8;
+        }
+
         // @TODO: Add Vaddr & Paddr functions
         inst->memReq = new Request(inst->readTid(), aligned_addr, req_size,
                                    flags, inst->readPC(), res->cpu->readCpuId(), inst->readTid());
-- 
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