From 41fc8a573ea61b2463606a0714a9e563494da329 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Fri, 19 Sep 2014 10:35:18 -0400
Subject: arch: Pass faults by const reference where possible

This patch changes how faults are passed between methods in an attempt
to copy as few reference-counting pointer instances as possible. This
should avoid unecessary copies being created, contributing to the
increment/decrement of the reference counters.
---
 src/cpu/inorder/resources/cache_unit.cc     | 2 +-
 src/cpu/inorder/resources/cache_unit.hh     | 2 +-
 src/cpu/inorder/resources/fetch_seq_unit.cc | 2 +-
 src/cpu/inorder/resources/fetch_seq_unit.hh | 2 +-
 src/cpu/inorder/resources/fetch_unit.cc     | 2 +-
 src/cpu/inorder/resources/fetch_unit.hh     | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

(limited to 'src/cpu/inorder/resources')

diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index dea4f91fb..251369e01 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -405,7 +405,7 @@ CacheUnit::doTLBAccess(DynInstPtr inst, CacheReqPtr cache_req, int acc_size,
 }
 
 void
-CacheUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
+CacheUnit::trap(const Fault &fault, ThreadID tid, DynInstPtr inst)
 {
     tlbBlocked[tid] = false;
 }
diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh
index 9a7faf9cd..65f18eedb 100644
--- a/src/cpu/inorder/resources/cache_unit.hh
+++ b/src/cpu/inorder/resources/cache_unit.hh
@@ -113,7 +113,7 @@ class CacheUnit : public Resource
 
     bool processSquash(CacheReqPacket *cache_pkt);
 
-    void trap(Fault fault, ThreadID tid, DynInstPtr inst);
+    void trap(const Fault &fault, ThreadID tid, DynInstPtr inst);
 
     void recvRetry();
     
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc
index 03741b55c..ead4953fb 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.cc
+++ b/src/cpu/inorder/resources/fetch_seq_unit.cc
@@ -304,7 +304,7 @@ FetchSeqUnit::suspendThread(ThreadID tid)
 }
 
 void
-FetchSeqUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
+FetchSeqUnit::trap(const Fault &fault, ThreadID tid, DynInstPtr inst)
 {
     pcValid[tid] = true;
     pc[tid] = cpu->pcState(tid);
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.hh b/src/cpu/inorder/resources/fetch_seq_unit.hh
index 4cb18a1c7..a8db85b06 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.hh
+++ b/src/cpu/inorder/resources/fetch_seq_unit.hh
@@ -71,7 +71,7 @@ class FetchSeqUnit : public Resource {
                 InstSeqNum squash_seq_num, ThreadID tid);
 
     /** Update to correct PC from a trap */
-    void trap(Fault fault, ThreadID tid, DynInstPtr inst);
+    void trap(const Fault &fault, ThreadID tid, DynInstPtr inst);
 
   protected:
     unsigned instSize;
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc
index 49bd0434b..6892688b2 100644
--- a/src/cpu/inorder/resources/fetch_unit.cc
+++ b/src/cpu/inorder/resources/fetch_unit.cc
@@ -574,7 +574,7 @@ FetchUnit::squashCacheRequest(CacheReqPtr req_ptr)
 }
 
 void
-FetchUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
+FetchUnit::trap(const Fault &fault, ThreadID tid, DynInstPtr inst)
 {
     //@todo: per thread?
     decoder[tid]->reset();
diff --git a/src/cpu/inorder/resources/fetch_unit.hh b/src/cpu/inorder/resources/fetch_unit.hh
index d1c7b22c0..d72721009 100644
--- a/src/cpu/inorder/resources/fetch_unit.hh
+++ b/src/cpu/inorder/resources/fetch_unit.hh
@@ -87,7 +87,7 @@ class FetchUnit : public CacheUnit
     /** Executes one of the commands from the "Command" enum */
     void execute(int slot_num);
 
-    void trap(Fault fault, ThreadID tid, DynInstPtr inst);
+    void trap(const Fault &fault, ThreadID tid, DynInstPtr inst);
 
     TheISA::Decoder *decoder[ThePipeline::MaxThreads];
 
-- 
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