From de21bb93ea4312a7e958698c634b16b10e02e21a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 18 Nov 2011 01:33:28 -0800 Subject: SE/FS: Get rid of FULL_SYSTEM in the CPU directory. --- src/cpu/inorder/cpu.cc | 124 +++++++++++++--------------- src/cpu/inorder/cpu.hh | 2 - src/cpu/inorder/inorder_cpu_builder.cc | 20 +++-- src/cpu/inorder/params.hh | 2 - src/cpu/inorder/resources/cache_unit.cc | 5 -- src/cpu/inorder/resources/cache_unit.hh | 3 +- src/cpu/inorder/resources/execution_unit.cc | 15 ++-- src/cpu/inorder/thread_context.cc | 12 ++- src/cpu/inorder/thread_context.hh | 2 - src/cpu/inorder/thread_state.hh | 12 +-- 10 files changed, 87 insertions(+), 110 deletions(-) (limited to 'src/cpu/inorder') diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index 226b2d8ea..9d6ecc7e1 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -33,7 +33,6 @@ #include "arch/utility.hh" #include "base/bigint.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "cpu/inorder/resources/resource_list.hh" #include "cpu/inorder/cpu.hh" @@ -51,11 +50,13 @@ #include "cpu/thread_context.hh" #include "debug/Activity.hh" #include "debug/InOrderCPU.hh" +#include "debug/Interrupt.hh" #include "debug/RefCount.hh" #include "debug/SkedCache.hh" #include "debug/Quiesce.hh" #include "mem/translating_port.hh" #include "params/InOrderCPU.hh" +#include "sim/full_system.hh" #include "sim/process.hh" #include "sim/stat_control.hh" #include "sim/system.hh" @@ -150,12 +151,11 @@ InOrderCPU::CPUEvent::process() cpu->trapPending[tid] = false; break; -#if !FULL_SYSTEM case Syscall: cpu->syscall(inst->syscallNum, tid); cpu->resPool->trap(fault, tid, inst); break; -#endif + default: fatal("Unrecognized Event Type %s", eventNames[cpuEventType]); } @@ -195,9 +195,7 @@ InOrderCPU::InOrderCPU(Params *params) timeBuffer(2 , 2), removeInstsThisCycle(false), activityRec(params->name, NumStages, 10, params->activity), -#if FULL_SYSTEM system(params->system), -#endif // FULL_SYSTEM #ifdef DEBUG cpuEventNum(0), resReqCount(0), @@ -216,35 +214,32 @@ InOrderCPU::InOrderCPU(Params *params) // Resize for Multithreading CPUs thread.resize(numThreads); -#if FULL_SYSTEM - active_threads = 1; -#else - active_threads = params->workload.size(); + if (FullSystem) { + active_threads = 1; + } else { + active_threads = params->workload.size(); - if (active_threads > MaxThreads) { - panic("Workload Size too large. Increase the 'MaxThreads'" - "in your InOrder implementation or " - "edit your workload size."); - } + if (active_threads > MaxThreads) { + panic("Workload Size too large. Increase the 'MaxThreads'" + "in your InOrder implementation or " + "edit your workload size."); + } - - if (active_threads > 1) { - threadModel = (InOrderCPU::ThreadModel) params->threadModel; - - if (threadModel == SMT) { - DPRINTF(InOrderCPU, "Setting Thread Model to SMT.\n"); - } else if (threadModel == SwitchOnCacheMiss) { - DPRINTF(InOrderCPU, "Setting Thread Model to " - "Switch On Cache Miss\n"); + + if (active_threads > 1) { + threadModel = (InOrderCPU::ThreadModel) params->threadModel; + + if (threadModel == SMT) { + DPRINTF(InOrderCPU, "Setting Thread Model to SMT.\n"); + } else if (threadModel == SwitchOnCacheMiss) { + DPRINTF(InOrderCPU, "Setting Thread Model to " + "Switch On Cache Miss\n"); + } + + } else { + threadModel = Single; } - - } else { - threadModel = Single; } - - - -#endif // Bind the fetch & data ports from the resource pool. fetchPortIdx = resPool->getPortIdx(params->fetchMemPort); @@ -261,36 +256,34 @@ InOrderCPU::InOrderCPU(Params *params) pc[tid].set(0); lastCommittedPC[tid].set(0); -#if FULL_SYSTEM - // SMT is not supported in FS mode yet. - assert(numThreads == 1); - thread[tid] = new Thread(this, 0, NULL); -#else - if (tid < (ThreadID)params->workload.size()) { - DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n", - tid, params->workload[tid]->prog_fname); - thread[tid] = - new Thread(this, tid, params->workload[tid]); + if (FullSystem) { + // SMT is not supported in FS mode yet. + assert(numThreads == 1); + thread[tid] = new Thread(this, 0, NULL); } else { - //Allocate Empty thread so M5 can use later - //when scheduling threads to CPU - Process* dummy_proc = params->workload[0]; - thread[tid] = new Thread(this, tid, dummy_proc); + if (tid < (ThreadID)params->workload.size()) { + DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n", + tid, params->workload[tid]->prog_fname); + thread[tid] = + new Thread(this, tid, params->workload[tid]); + } else { + //Allocate Empty thread so M5 can use later + //when scheduling threads to CPU + Process* dummy_proc = params->workload[0]; + thread[tid] = new Thread(this, tid, dummy_proc); + } + + // Eventually set this with parameters... + asid[tid] = tid; } - - // Eventually set this with parameters... - asid[tid] = tid; -#endif // Setup the TC that will serve as the interface to the threads/CPU. InOrderThreadContext *tc = new InOrderThreadContext; tc->cpu = this; tc->thread = thread[tid]; -#if FULL_SYSTEM // Setup quiesce event. this->thread[tid]->quiesceEvent = new EndQuiesceEvent(tc); -#endif // Give the thread the TC. thread[tid]->tc = tc; @@ -349,16 +342,17 @@ InOrderCPU::InOrderCPU(Params *params) dummyReq[tid] = new ResourceRequest(resPool->getResource(0)); -#if FULL_SYSTEM - // Use this dummy inst to force squashing behind every instruction - // in pipeline - dummyTrapInst[tid] = new InOrderDynInst(this, NULL, 0, 0, 0); - dummyTrapInst[tid]->seqNum = 0; - dummyTrapInst[tid]->squashSeqNum = 0; - dummyTrapInst[tid]->setTid(tid); -#endif - trapPending[tid] = false; + if (FullSystem) { + // Use this dummy inst to force squashing behind every instruction + // in pipeline + dummyTrapInst[tid] = new InOrderDynInst(this, NULL, 0, 0, 0); + dummyTrapInst[tid]->seqNum = 0; + dummyTrapInst[tid]->squashSeqNum = 0; + dummyTrapInst[tid]->setTid(tid); + } + + trapPending[tid] = false; } @@ -699,9 +693,7 @@ InOrderCPU::tick() ++numCycles; -#if FULL_SYSTEM checkForInterrupts(); -#endif bool pipes_idle = true; //Tick each of the stages @@ -762,12 +754,12 @@ InOrderCPU::init() for (ThreadID tid = 0; tid < numThreads; ++tid) thread[tid]->inSyscall = true; -#if FULL_SYSTEM - for (ThreadID tid = 0; tid < numThreads; tid++) { - ThreadContext *src_tc = threadContexts[tid]; - TheISA::initCPU(src_tc, src_tc->contextId()); + if (FullSystem) { + for (ThreadID tid = 0; tid < numThreads; tid++) { + ThreadContext *src_tc = threadContexts[tid]; + TheISA::initCPU(src_tc, src_tc->contextId()); + } } -#endif // Clear inSyscall. for (ThreadID tid = 0; tid < numThreads; ++tid) diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index 8e915c08c..dc5a23b98 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -780,10 +780,8 @@ class InOrderCPU : public BaseCPU return total; } -#if FULL_SYSTEM /** Pointer to the system. */ System *system; -#endif /** The global sequence number counter. */ InstSeqNum globalSeqNum[ThePipeline::MaxThreads]; diff --git a/src/cpu/inorder/inorder_cpu_builder.cc b/src/cpu/inorder/inorder_cpu_builder.cc index 99729577e..bde5b1e94 100644 --- a/src/cpu/inorder/inorder_cpu_builder.cc +++ b/src/cpu/inorder/inorder_cpu_builder.cc @@ -38,21 +38,23 @@ #include "cpu/inst_seq.hh" #include "cpu/static_inst.hh" #include "params/InOrderCPU.hh" +#include "sim/full_system.hh" InOrderCPU * InOrderCPUParams::create() { -#if FULL_SYSTEM - // Full-system only supports a single thread for the moment. - ThreadID actual_num_threads = 1; -#else - ThreadID actual_num_threads = - (numThreads >= workload.size()) ? numThreads : workload.size(); + ThreadID actual_num_threads; + if (FullSystem) { + // Full-system only supports a single thread for the moment. + actual_num_threads = 1; + } else { + actual_num_threads = + (numThreads >= workload.size()) ? numThreads : workload.size(); - if (workload.size() == 0) { - fatal("Must specify at least one workload!"); + if (workload.size() == 0) { + fatal("Must specify at least one workload!"); + } } -#endif numThreads = actual_num_threads; diff --git a/src/cpu/inorder/params.hh b/src/cpu/inorder/params.hh index 51b7409ad..44f2a5018 100644 --- a/src/cpu/inorder/params.hh +++ b/src/cpu/inorder/params.hh @@ -50,10 +50,8 @@ class InOrderParams : public BaseCPU::Params public: // Workloads -#if !FULL_SYSTEM std::vector workload; Process *process; -#endif // FULL_SYSTEM // // Memory System/Caches diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index 73dd9c527..90ed83d68 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -150,14 +150,11 @@ CacheUnit::CachePort::setPeer(Port *port) { Port::setPeer(port); -#if FULL_SYSTEM // Update the ThreadContext's memory ports (Functional/Virtual // Ports) if (cachePortUnit->resName == "dcache_port") { cachePortUnit->cpu->updateMemPorts(); } - -#endif } Port * @@ -454,13 +451,11 @@ CacheUnit::doTLBAccess(DynInstPtr inst, CacheReqPtr cache_req, int acc_size, } } -#if !FULL_SYSTEM void CacheUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst) { tlbBlocked[tid] = false; } -#endif Fault CacheUnit::read(DynInstPtr inst, Addr addr, diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh index 6bb5868b1..a8dde512b 100644 --- a/src/cpu/inorder/resources/cache_unit.hh +++ b/src/cpu/inorder/resources/cache_unit.hh @@ -158,9 +158,8 @@ class CacheUnit : public Resource bool processSquash(CacheReqPacket *cache_pkt); -#if !FULL_SYSTEM void trap(Fault fault, ThreadID tid, DynInstPtr inst); -#endif + void recvRetry(); /** Returns a specific port. */ diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc index a0a486269..16f737308 100644 --- a/src/cpu/inorder/resources/execution_unit.cc +++ b/src/cpu/inorder/resources/execution_unit.cc @@ -38,6 +38,7 @@ #include "debug/Fault.hh" #include "debug/InOrderExecute.hh" #include "debug/InOrderStall.hh" +#include "sim/full_system.hh" using namespace std; using namespace ThePipeline; @@ -219,14 +220,14 @@ ExecutionUnit::execute(int slot_num) seq_num, didx, inst->readIntResult(didx)); #endif -#if !FULL_SYSTEM - // The Syscall might change the PC, so conservatively - // squash everything behing it - if (inst->isSyscall()) { - inst->setSquashInfo(stage_num); - setupSquash(inst, stage_num, tid); + if (!FullSystem) { + // The Syscall might change the PC, so conservatively + // squash everything behing it + if (inst->isSyscall()) { + inst->setSquashInfo(stage_num); + setupSquash(inst, stage_num, tid); + } } -#endif } else { DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: had a %s " "fault.\n", inst->readTid(), seq_num, fault->name()); diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc index ecdb61f1f..5f141a1b3 100644 --- a/src/cpu/inorder/thread_context.cc +++ b/src/cpu/inorder/thread_context.cc @@ -34,6 +34,7 @@ #include "cpu/inorder/thread_context.hh" #include "cpu/exetrace.hh" #include "debug/InOrderCPU.hh" +#include "sim/full_system.hh" using namespace TheISA; @@ -88,9 +89,7 @@ InOrderThreadContext::takeOverFrom(ThreadContext *old_context) setStatus(old_context->status()); copyArchRegs(old_context); -#if !FULL_SYSTEM thread->funcExeInst = old_context->readFuncExeInst(); -#endif old_context->setStatus(ThreadContext::Halted); @@ -143,11 +142,10 @@ InOrderThreadContext::halt(int delay) void InOrderThreadContext::regStats(const std::string &name) { -#if FULL_SYSTEM - thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system); - thread->kernelStats->regStats(name + ".kern"); -#endif - ; + if (FullSystem) { + thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system); + thread->kernelStats->regStats(name + ".kern"); + } } diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh index daba6e6b6..84d62137e 100644 --- a/src/cpu/inorder/thread_context.hh +++ b/src/cpu/inorder/thread_context.hh @@ -109,11 +109,9 @@ class InOrderThreadContext : public ThreadContext void setNextMicroPC(uint64_t val) { }; -#if FULL_SYSTEM /** Returns a pointer to physical memory. */ PhysicalMemory *getPhysMemPtr() { assert(0); return 0; /*return cpu->physmem;*/ } -#endif /** Returns a pointer to this thread's kernel statistics. */ TheISA::Kernel::Statistics *getKernelStats() diff --git a/src/cpu/inorder/thread_state.hh b/src/cpu/inorder/thread_state.hh index fc5158d4f..1ffc59f65 100644 --- a/src/cpu/inorder/thread_state.hh +++ b/src/cpu/inorder/thread_state.hh @@ -39,17 +39,13 @@ #include "cpu/thread_state.hh" #include "sim/sim_exit.hh" -class Event; -class InOrderCPU; - -#if FULL_SYSTEM class EndQuiesceEvent; -class FunctionProfile; -class ProfileNode; -#else +class Event; class FunctionalMemory; -#endif +class FunctionProfile; +class InOrderCPU; class Process; +class ProfileNode; /** * Class that has various thread state, such as the status, the -- cgit v1.2.3