From e3b19cb294c98466a431950888045c6b5d24b675 Mon Sep 17 00:00:00 2001 From: Curtis Dunham Date: Tue, 13 May 2014 12:20:48 -0500 Subject: mem: Refactor assignment of Packet types Put the packet type swizzling (that is currently done in a lot of places) into a refineCommand() member function. --- src/cpu/inorder/resources/cache_unit.cc | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) (limited to 'src/cpu/inorder') diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index c71678a91..dea4f91fb 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -812,21 +812,11 @@ CacheUnit::finishCacheUnitReq(DynInstPtr inst, CacheRequest *cache_req) void CacheUnit::buildDataPacket(CacheRequest *cache_req) { - // Check for LL/SC and if so change command - if (cache_req->memReq->isLLSC() && cache_req->pktCmd == MemCmd::ReadReq) { - cache_req->pktCmd = MemCmd::LoadLockedReq; - } - - if (cache_req->pktCmd == MemCmd::WriteReq) { - cache_req->pktCmd = - cache_req->memReq->isSwap() ? MemCmd::SwapReq : - (cache_req->memReq->isLLSC() ? MemCmd::StoreCondReq - : MemCmd::WriteReq); - } - cache_req->dataPkt = new CacheReqPacket(cache_req, cache_req->pktCmd, cache_req->instIdx); + cache_req->dataPkt->refineCommand(); // handle LL/SC, etc. + DPRINTF(InOrderCachePort, "[slot:%i]: Slot marked for %x\n", cache_req->getSlot(), cache_req->dataPkt->getAddr()); -- cgit v1.2.3