From 5db547bca46f23aa5cf25aa5d38efae9ef1eabc2 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Sun, 16 Mar 2014 17:30:24 +0100 Subject: kvm: x86: Adjust PC to remove the CS segment base address gem5 seems to store the PC as RIP+CS_BASE. This is not what KVM expects, so we need to subtract CS_BASE prior to transferring the PC into KVM. This changeset adds the necessary PC manipulation and refactors thread context updates slightly to avoid reading registers multiple times from KVM. --HG-- extra : rebase_source : 3f0569dca06a1fcd8694925f75c8918d954ada44 --- src/cpu/kvm/x86_cpu.hh | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/cpu/kvm/x86_cpu.hh') diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh index 7dacdb03f..bfd090ff7 100644 --- a/src/cpu/kvm/x86_cpu.hh +++ b/src/cpu/kvm/x86_cpu.hh @@ -209,13 +209,14 @@ class X86KvmCPU : public BaseKvmCPU * @{ */ /** Update integer registers */ - void updateThreadContextRegs(); + void updateThreadContextRegs(const struct kvm_regs ®s, + const struct kvm_sregs &sregs); /** Update control registers (CRx, segments, etc.) */ - void updateThreadContextSRegs(); + void updateThreadContextSRegs(const struct kvm_sregs &sregs); /** Update FPU and SIMD registers using the legacy API */ - void updateThreadContextFPU(); + void updateThreadContextFPU(const struct kvm_fpu &fpu); /** Update FPU and SIMD registers using the XSave API */ - void updateThreadContextXSave(); + void updateThreadContextXSave(const struct kvm_xsave &kxsave); /** Update MSR registers */ void updateThreadContextMSRs(); /** @} */ -- cgit v1.2.3