From 0782d92286ded450b7e615fefbd5d6d5e738c8cd Mon Sep 17 00:00:00 2001
From: Binh Pham <binhpham@cs.rutgers.edu>
Date: Sat, 21 Jun 2014 10:26:43 -0700
Subject: o3: split load & store queue full cases in rename

Check for free entries in Load Queue and Store Queue separately to
avoid cases when load cannot be renamed due to full Store Queue and
vice versa.

This work was done while Binh was an intern at AMD Research.
---
 src/cpu/o3/comm.hh | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

(limited to 'src/cpu/o3/comm.hh')

diff --git a/src/cpu/o3/comm.hh b/src/cpu/o3/comm.hh
index 587e1d9e7..ab0a9ff42 100644
--- a/src/cpu/o3/comm.hh
+++ b/src/cpu/o3/comm.hh
@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2011 ARM Limited
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -144,13 +145,15 @@ struct TimeBufStruct {
     struct iewComm {
         // Also eventually include skid buffer space.
         unsigned freeIQEntries;
-        unsigned freeLSQEntries;
+        unsigned freeLQEntries;
+        unsigned freeSQEntries;
+        unsigned dispatchedToLQ;
+        unsigned dispatchedToSQ;
 
         unsigned iqCount;
         unsigned ldstqCount;
 
         unsigned dispatched;
-        unsigned dispatchedToLSQ;
         bool usedIQ;
         bool usedLSQ;
     };
-- 
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