From 3bb49cb2b01e55e33cd2ca7a872be65c49fabfc6 Mon Sep 17 00:00:00 2001 From: Rekai Gonzalez-Alberquilla Date: Fri, 10 Feb 2017 17:30:22 +0000 Subject: cpu,arch-arm: Initialise data members The value that is not initialized has a bogus value that manifests when using some debug-flags what makes the usage of tracediff a bit more challenging. In addition, while debugging with other techniques, it introduces the problem of understanding if the value of a field is 'intended' or just an effect of the lack of initialisation. Change-Id: Ied88caa77479c6f1d5166d80d1a1a057503cb106 Signed-off-by: Giacomo Gabrielli Reviewed-on: https://gem5-review.googlesource.com/c/13125 Maintainer: Nikos Nikoleris Reviewed-by: Jason Lowe-Power --- src/cpu/o3/commit_impl.hh | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'src/cpu/o3/commit_impl.hh') diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 4775e98d1..40ce8480e 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -132,17 +132,19 @@ DefaultCommit::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params) "RoundRobin, OldestReady"); } - for (ThreadID tid = 0; tid < numThreads; tid++) { + for (ThreadID tid = 0; tid < Impl::MaxThreads; tid++) { commitStatus[tid] = Idle; changedROBNumEntries[tid] = false; - checkEmptyROB[tid] = false; - trapInFlight[tid] = false; - committedStores[tid] = false; trapSquash[tid] = false; tcSquash[tid] = false; + squashAfterInst[tid] = nullptr; pc[tid].set(0); + youngestSeqNum[tid] = 0; lastCommitedSeqNum[tid] = 0; - squashAfterInst[tid] = NULL; + trapInFlight[tid] = false; + committedStores[tid] = false; + checkEmptyROB[tid] = false; + renameMap[tid] = nullptr; } interrupt = NoFault; } -- cgit v1.2.3