From be28d96510e0e722db83b26f1a12d3f5de979b32 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Wed, 6 Apr 2016 19:43:31 +0100 Subject: Revert power patch sets with unexpected interactions The following patches had unexpected interactions with the current upstream code and have been reverted for now: e07fd01651f3: power: Add support for power models 831c7f2f9e39: power: Low-power idle power state for idle CPUs 4f749e00b667: power: Add power states to ClockedObject Signed-off-by: Andreas Sandberg --HG-- extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508 --- src/cpu/o3/fetch_impl.hh | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/cpu/o3/fetch_impl.hh') diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 3b29d87d4..4b1479bcb 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -378,7 +378,7 @@ template void DefaultFetch::processCacheCompletion(PacketPtr pkt) { - ThreadID tid = cpu->contextToThread(pkt->req->contextId()); + ThreadID tid = pkt->req->threadId(); DPRINTF(Fetch, "[tid:%u] Waking up from cache miss.\n", tid); assert(!cpu->switchedOut()); @@ -622,7 +622,7 @@ DefaultFetch::fetchCacheLine(Addr vaddr, ThreadID tid, Addr pc) RequestPtr mem_req = new Request(tid, fetchBufferBlockPC, fetchBufferSize, Request::INST_FETCH, cpu->instMasterId(), pc, - cpu->thread[tid]->contextId()); + cpu->thread[tid]->contextId(), tid); mem_req->taskId(cpu->taskId()); @@ -640,7 +640,7 @@ template void DefaultFetch::finishTranslation(const Fault &fault, RequestPtr mem_req) { - ThreadID tid = cpu->contextToThread(mem_req->contextId()); + ThreadID tid = mem_req->threadId(); Addr fetchBufferBlockPC = mem_req->getVaddr(); assert(!cpu->switchedOut()); -- cgit v1.2.3