From 43d833246fcfe092a0c08dde1fdf7e3d409d1af9 Mon Sep 17 00:00:00 2001 From: Nathanael Premillieu Date: Wed, 5 Apr 2017 12:46:06 -0500 Subject: cpu: Physical register structural + flat indexing Mimic the changes done on the architectural register indexes on the physical register indexes. This is specific to the O3 model. The structure, called PhysRegId, contains a register class, a register index and a flat register index. The flat register index is kept because it is useful in some cases where the type of register is not important (dependency graph and scoreboard for example). Instead of directly using the structure, most of the code is working with a const PhysRegId* (typedef to PhysRegIdPtr). The actual PhysRegId objects are stored in the regFile. Change-Id: Ic879a3cc608aa2f34e2168280faac1846de77667 Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/2701 Reviewed-by: Anthony Gutierrez Maintainer: Andreas Sandberg --- src/cpu/o3/free_list.hh | 48 ++++++++++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 20 deletions(-) (limited to 'src/cpu/o3/free_list.hh') diff --git a/src/cpu/o3/free_list.hh b/src/cpu/o3/free_list.hh index aa805e26e..3e6740e57 100644 --- a/src/cpu/o3/free_list.hh +++ b/src/cpu/o3/free_list.hh @@ -34,6 +34,7 @@ #include #include +#include #include "base/misc.hh" #include "base/trace.hh" @@ -53,20 +54,20 @@ class SimpleFreeList private: /** The actual free list */ - std::queue freeRegs; + std::queue freeRegs; public: SimpleFreeList() {}; /** Add a physical register to the free list */ - void addReg(PhysRegIndex reg) { freeRegs.push(reg); } + void addReg(PhysRegIdPtr reg) { freeRegs.push(reg); } /** Get the next available register from the free list */ - PhysRegIndex getReg() + PhysRegIdPtr getReg() { assert(!freeRegs.empty()); - PhysRegIndex free_reg = freeRegs.front(); + PhysRegIdPtr free_reg = freeRegs.front(); freeRegs.pop(); return free_reg; } @@ -140,25 +141,25 @@ class UnifiedFreeList SimpleFreeList *getCCList() { return &ccList; } /** Gets a free integer register. */ - PhysRegIndex getIntReg() { return intList.getReg(); } + PhysRegIdPtr getIntReg() { return intList.getReg(); } /** Gets a free fp register. */ - PhysRegIndex getFloatReg() { return floatList.getReg(); } + PhysRegIdPtr getFloatReg() { return floatList.getReg(); } /** Gets a free cc register. */ - PhysRegIndex getCCReg() { return ccList.getReg(); } + PhysRegIdPtr getCCReg() { return ccList.getReg(); } /** Adds a register back to the free list. */ - void addReg(PhysRegIndex freed_reg); + void addReg(PhysRegIdPtr freed_reg); /** Adds an integer register back to the free list. */ - void addIntReg(PhysRegIndex freed_reg) { intList.addReg(freed_reg); } + void addIntReg(PhysRegIdPtr freed_reg) { intList.addReg(freed_reg); } /** Adds a fp register back to the free list. */ - void addFloatReg(PhysRegIndex freed_reg) { floatList.addReg(freed_reg); } + void addFloatReg(PhysRegIdPtr freed_reg) { floatList.addReg(freed_reg); } /** Adds a cc register back to the free list. */ - void addCCReg(PhysRegIndex freed_reg) { ccList.addReg(freed_reg); } + void addCCReg(PhysRegIdPtr freed_reg) { ccList.addReg(freed_reg); } /** Checks if there are any free integer registers. */ bool hasFreeIntRegs() const { return intList.hasFreeRegs(); } @@ -180,18 +181,25 @@ class UnifiedFreeList }; inline void -UnifiedFreeList::addReg(PhysRegIndex freed_reg) +UnifiedFreeList::addReg(PhysRegIdPtr freed_reg) { - DPRINTF(FreeList,"Freeing register %i.\n", freed_reg); + DPRINTF(FreeList,"Freeing register %i (%s).\n", freed_reg->regIdx, + RegClassStrings[freed_reg->regClass]); //Might want to add in a check for whether or not this register is //already in there. A bit vector or something similar would be useful. - if (regFile->isIntPhysReg(freed_reg)) { - intList.addReg(freed_reg); - } else if (regFile->isFloatPhysReg(freed_reg)) { - floatList.addReg(freed_reg); - } else { - assert(regFile->isCCPhysReg(freed_reg)); - ccList.addReg(freed_reg); + switch (freed_reg->regClass) { + case IntRegClass: + intList.addReg(freed_reg); + break; + case FloatRegClass: + floatList.addReg(freed_reg); + break; + case CCRegClass: + ccList.addReg(freed_reg); + break; + default: + panic("Unexpected RegClass (%s)", + RegClassStrings[freed_reg->regClass]); } // These assert conditions ensure that the number of free -- cgit v1.2.3