From 5c1742b822c1f4d640d30963a908386caf8c4a6e Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Sat, 18 Apr 2009 10:42:29 -0400 Subject: o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly --- src/cpu/o3/iew_impl.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/o3/iew_impl.hh') diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index 1daecd669..778ff444f 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -1282,7 +1282,7 @@ DefaultIEW::executeInsts() fetchRedirect[tid] = true; DPRINTF(IEW, "Execute: Branch mispredict detected.\n"); - DPRINTF(IEW, "Predicted target was %#x, %#x.\n", + DPRINTF(IEW, "Predicted target was PC:%#x, NPC:%#x.\n", inst->readPredPC(), inst->readPredNPC()); DPRINTF(IEW, "Execute: Redirecting fetch to PC: %#x," " NPC: %#x.\n", inst->readNextPC(), -- cgit v1.2.3