From 0ca254aa8381ba2fae61a4a056301e35da9ffab3 Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Thu, 28 Feb 2019 17:07:16 +0800 Subject: invisispec-1.0 source --- src/cpu/o3/lsq_impl.hh | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'src/cpu/o3/lsq_impl.hh') diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 56b95a5b6..1e78f534e 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -310,6 +310,44 @@ LSQ::writebackStores() } } +// [mengjia] +template +int +LSQ::exposeLoads() +{ + list::iterator threads = activeThreads->begin(); + list::iterator end = activeThreads->end(); + + int exposedLoads = 0; + while (threads != end) { + ThreadID tid = *threads++; + + if (numLoadsToVLD(tid) > 0) { + DPRINTF(Writeback,"[tid:%i] Validate loads. %i loads " + "available for Validate.\n", tid, numLoadsToVLD(tid)); + } + + exposedLoads += thread[tid].exposeLoads(); + } + return exposedLoads; +} + + +// [mengjia] +template +void +LSQ::updateVisibleState() +{ + list::iterator threads = activeThreads->begin(); + list::iterator end = activeThreads->end(); + + while (threads != end) { + ThreadID tid = *threads++; + + thread[tid].updateVisibleState(); + } +} + template bool LSQ::violation() @@ -339,6 +377,7 @@ LSQ::recvReqRetry() } } +// [InvisiSpec] Callback function for receiving a response template bool LSQ::recvTimingResp(PacketPtr pkt) @@ -347,6 +386,17 @@ LSQ::recvTimingResp(PacketPtr pkt) DPRINTF(LSQ, "Got error packet back for address: %#X\n", pkt->getAddr()); + // for expose or validate request, + // if the instruction is squashed, maybe the req has been deleted + if (pkt->isValidate() || pkt->isExpose()){ + if (!pkt->req){ + delete pkt; + return true; + } + DPRINTF(LSQ, "Receive an expose/validate response, idx=%d\n", + pkt->reqIdx); + } + thread[cpu->contextToThread(pkt->req->contextId())] .completeDataAccess(pkt); -- cgit v1.2.3