From 48281375ee23283d24cf9d7fe5f6315afdb3a6fc Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Tue, 5 May 2015 03:22:33 -0400 Subject: mem, cpu: Add a separate flag for strictly ordered memory The Request::UNCACHEABLE flag currently has two different functions. The first, and obvious, function is to prevent the memory system from caching data in the request. The second function is to prevent reordering and speculation in CPU models. This changeset gives the order/speculation requirement a separate flag (Request::STRICT_ORDER). This flag prevents CPU models from doing the following optimizations: * Speculation: CPU models are not allowed to issue speculative loads. * Write combining: CPU models and caches are not allowed to merge writes to the same cache line. Note: The memory system may still reorder accesses unless the UNCACHEABLE flag is set. It is therefore expected that the STRICT_ORDER flag is combined with the UNCACHEABLE flag to prevent this behavior. --- src/cpu/o3/lsq_unit.hh | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/cpu/o3/lsq_unit.hh') diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 6fe832bf6..e356dd442 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -559,15 +559,15 @@ LSQUnit::read(Request *req, Request *sreqLow, Request *sreqHigh, assert(!load_inst->isExecuted()); - // Make sure this isn't an uncacheable access - // A bit of a hackish way to get uncached accesses to work only if they're - // at the head of the LSQ and are ready to commit (at the head of the ROB - // too). - if (req->isUncacheable() && + // Make sure this isn't a strictly ordered load + // A bit of a hackish way to get strictly ordered accesses to work + // only if they're at the head of the LSQ and are ready to commit + // (at the head of the ROB too). + if (req->isStrictlyOrdered() && (load_idx != loadHead || !load_inst->isAtCommit())) { iewStage->rescheduleMemInst(load_inst); ++lsqRescheduledLoads; - DPRINTF(LSQUnit, "Uncachable load [sn:%lli] PC %s\n", + DPRINTF(LSQUnit, "Strictly ordered load [sn:%lli] PC %s\n", load_inst->seqNum, load_inst->pcState()); // Must delete request now that it wasn't handed off to @@ -579,7 +579,7 @@ LSQUnit::read(Request *req, Request *sreqLow, Request *sreqHigh, delete sreqHigh; } return std::make_shared( - "Uncachable load [sn:%llx] PC %s\n", + "Strictly ordered load [sn:%llx] PC %s\n", load_inst->seqNum, load_inst->pcState()); } @@ -653,7 +653,7 @@ LSQUnit::read(Request *req, Request *sreqLow, Request *sreqHigh, if (store_size == 0) continue; - else if (storeQueue[store_idx].inst->uncacheable()) + else if (storeQueue[store_idx].inst->strictlyOrdered()) continue; assert(storeQueue[store_idx].inst->effAddrValid()); -- cgit v1.2.3