From 9f465d0a1b35a37a1c5d3489de0f78f314a662d1 Mon Sep 17 00:00:00 2001 From: Matthias Hille Date: Mon, 28 Aug 2017 22:32:06 +0200 Subject: cpu-o3: fix data pkt initialization for split load When a split load hits a memory region where IPRs are mapped, the Writebackevent which is scheduled for that was carrying a data packet that was not correctly initialized which caused an assertion to fire when the Writeback event is processed. Change-Id: I71a4e291f0086f7468d7e8124a0a8f098088972f Signed-off-by: Matthias Hille Reported-by: Matthias Hille Reviewed-on: https://gem5-review.googlesource.com/4620 Reviewed-by: Andreas Sandberg Reviewed-by: Gabe Black Maintainer: Andreas Sandberg --- src/cpu/o3/lsq_unit.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/o3/lsq_unit.hh') diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 9d885302b..b8e895571 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -610,8 +610,8 @@ LSQUnit::read(Request *req, Request *sreqLow, Request *sreqHigh, Cycles delay(0); PacketPtr data_pkt = new Packet(req, MemCmd::ReadReq); + data_pkt->dataStatic(load_inst->memData); if (!TheISA::HasUnalignedMemAcc || !sreqLow) { - data_pkt->dataStatic(load_inst->memData); delay = TheISA::handleIprRead(thread, data_pkt); } else { assert(sreqLow->isMmappedIpr() && sreqHigh->isMmappedIpr()); -- cgit v1.2.3