From 3d5434022a2f97e5e855e17c8e46b08e38c8bb9e Mon Sep 17 00:00:00 2001 From: Rekai Date: Mon, 2 Mar 2015 04:00:38 -0500 Subject: cpu: o3 register renaming request handling improved Now, prior to the renaming, the instruction requests the exact amount of registers it will need, and the rename_map decides whether the instruction is allowed to proceed or not. --- src/cpu/o3/rename_impl.hh | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/cpu/o3/rename_impl.hh') diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index 04a9020d7..7bf33d3ff 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2012, 2014 ARM Limited + * Copyright (c) 2010-2012, 2014-2015 ARM Limited * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved. * @@ -633,7 +633,9 @@ DefaultRename::renameInsts(ThreadID tid) // Check here to make sure there are enough destination registers // to rename to. Otherwise block. - if (renameMap[tid]->numFreeEntries() < inst->numDestRegs()) { + if (!renameMap[tid]->canRename(inst->numIntDestRegs(), + inst->numFPDestRegs(), + inst->numCCDestRegs())) { DPRINTF(Rename, "Blocking due to lack of free " "physical registers to rename to.\n"); blockThisCycle = true; -- cgit v1.2.3