From af6aaf258171027af8d3cf0ef86dddff501a3ccb Mon Sep 17 00:00:00 2001
From: Geoffrey Blake <geoffrey.blake@arm.com>
Date: Tue, 31 Jan 2012 07:46:03 -0800
Subject: CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5

Brings the CheckerCPU back to life to allow FS and SE checking of the
O3CPU.  These changes have only been tested with the ARM ISA.  Other
ISAs potentially require modification.
---
 src/cpu/o3/thread_context.hh | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

(limited to 'src/cpu/o3/thread_context.hh')

diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 0205c63ef..23f3830d3 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2011 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2004-2006 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -32,6 +44,7 @@
 #define __CPU_O3_THREAD_CONTEXT_HH__
 
 #include "config/the_isa.hh"
+#include "config/use_checker.hh"
 #include "cpu/o3/isa_specific.hh"
 #include "cpu/thread_context.hh"
 
@@ -71,6 +84,10 @@ class O3ThreadContext : public ThreadContext
     /** Returns a pointer to the DTB. */
     TheISA::TLB *getDTBPtr() { return cpu->dtb; }
 
+#if USE_CHECKER
+    BaseCPU *getCheckerCpuPtr() { return NULL; }
+#endif
+
     Decoder *getDecoderPtr() { return &cpu->fetch.decoder; }
 
     /** Returns a pointer to this CPU. */
@@ -181,6 +198,10 @@ class O3ThreadContext : public ThreadContext
     /** Sets this thread's PC state. */
     virtual void pcState(const TheISA::PCState &val);
 
+#if USE_CHECKER
+    virtual void pcStateNoRecord(const TheISA::PCState &val);
+#endif
+
     /** Reads this thread's PC. */
     virtual Addr instAddr()
     { return cpu->instAddr(thread->threadId()); }
-- 
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