From 75b93179ab96de17c1ea62c3928d5fca9d5eb1be Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 6 Dec 2006 06:00:04 -0500 Subject: Flattening and syscallReturn fixes src/cpu/o3/thread_context_impl.hh: Use flattened indices src/cpu/simple_thread.hh: Use flattened indices, and pass a thread context to setSyscallReturn rather than a register file. src/cpu/thread_context.hh: The SyscallReturn class is no longer in arch/syscallreturn.hh --HG-- extra : convert_revision : ed84bb8ac5ef0774526ecd0d7270b0c60cd3708e --- src/cpu/o3/thread_context_impl.hh | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/cpu/o3/thread_context_impl.hh') diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index 0180756e3..29c00a0c3 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -29,6 +29,7 @@ * Korey Sewell */ +#include "arch/regfile.hh" #include "cpu/o3/thread_context.hh" #include "cpu/quiesce_event.hh" @@ -303,6 +304,7 @@ template uint64_t O3ThreadContext::readIntReg(int reg_idx) { + reg_idx = TheISA::flattenIntIndex(this, reg_idx); return cpu->readArchIntReg(reg_idx, thread->readTid()); } @@ -347,6 +349,7 @@ template void O3ThreadContext::setIntReg(int reg_idx, uint64_t val) { + reg_idx = TheISA::flattenIntIndex(this, reg_idx); cpu->setArchIntReg(reg_idx, val, thread->readTid()); // Squash if we're not already in a state update mode. -- cgit v1.2.3