From 88bbabe93f339f9db301caf43bf2cca2a0e8048c Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 19 Nov 2018 17:20:31 -0800 Subject: arch, cpu: Remove float type accessors. Use the binary accessors instead. Change-Id: Iff1877e92c79df02b3d13635391a8c2f025776a2 Reviewed-on: https://gem5-review.googlesource.com/c/14457 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- src/cpu/o3/thread_context_impl.hh | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) (limited to 'src/cpu/o3/thread_context_impl.hh') diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index d9f84fb52..f4b5cb4f4 100644 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -199,18 +199,11 @@ O3ThreadContext::readIntRegFlat(int reg_idx) return cpu->readArchIntReg(reg_idx, thread->threadId()); } -template -TheISA::FloatReg -O3ThreadContext::readFloatRegFlat(int reg_idx) -{ - return cpu->readArchFloatReg(reg_idx, thread->threadId()); -} - template TheISA::FloatRegBits O3ThreadContext::readFloatRegBitsFlat(int reg_idx) { - return cpu->readArchFloatRegInt(reg_idx, thread->threadId()); + return cpu->readArchFloatRegBits(reg_idx, thread->threadId()); } template @@ -251,20 +244,11 @@ O3ThreadContext::setIntRegFlat(int reg_idx, uint64_t val) conditionalSquash(); } -template -void -O3ThreadContext::setFloatRegFlat(int reg_idx, FloatReg val) -{ - cpu->setArchFloatReg(reg_idx, val, thread->threadId()); - - conditionalSquash(); -} - template void O3ThreadContext::setFloatRegBitsFlat(int reg_idx, FloatRegBits val) { - cpu->setArchFloatRegInt(reg_idx, val, thread->threadId()); + cpu->setArchFloatRegBits(reg_idx, val, thread->threadId()); conditionalSquash(); } -- cgit v1.2.3