From 93a168c25e5bb396ee749d25a2ab80ce7bec1764 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 12 Dec 2017 23:12:30 -0800 Subject: cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst. Neither of these were used, particularly memAccInst. Change-Id: I4ac9e44cf624e5de42519d586d7b699f08a2cdfc Reviewed-on: https://gem5-review.googlesource.com/6601 Maintainer: Gabe Black Reviewed-by: Andreas Sandberg --- src/cpu/o3/dyn_inst.hh | 19 ------------------- 1 file changed, 19 deletions(-) (limited to 'src/cpu/o3') diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 0643e7e30..8a0ae1d56 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -429,25 +429,6 @@ class BaseO3DynInst : public BaseDynInst panic("MIPS MT not defined for O3 CPU.\n"); } #endif - - public: - /** Calculates EA part of a memory instruction. Currently unused, - * though it may be useful in the future if we want to split - * memory operations into EA calculation and memory access parts. - */ - Fault calcEA() - { - return this->staticInst->eaCompInst()->execute(this, this->traceData); - } - - /** Does the memory access part of a memory instruction. Currently unused, - * though it may be useful in the future if we want to split - * memory operations into EA calculation and memory access parts. - */ - Fault memAccess() - { - return this->staticInst->memAccInst()->execute(this, this->traceData); - } }; #endif // __CPU_O3_ALPHA_DYN_INST_HH__ -- cgit v1.2.3