From ae3d45685512b75f878eb9d7917680fc3971988e Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 23 Feb 2011 15:10:49 -0600
Subject: ARM: Fix bug that let two table walks occur in parallel.

---
 src/cpu/o3/commit_impl.hh | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/cpu/o3')

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 50c08e162..01e235722 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1142,6 +1142,8 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
 
         commitStatus[tid] = TrapPending;
 
+        DPRINTF(Commit, "Committing instruction with fault [sn:%lli]\n",
+            head_inst->seqNum);
         if (head_inst->traceData) {
             if (DTRACE(ExecFaulting)) {
                 head_inst->traceData->setFetchSeq(head_inst->seqNum);
-- 
cgit v1.2.3