From b569f8f0ed8dcf32347f0d4f68d2d7572a5d1353 Mon Sep 17 00:00:00 2001
From: Korey Sewell <ksewell@umich.edu>
Date: Tue, 12 May 2009 15:01:14 -0400
Subject: inorder-bpred: edits to handle non-delay-slot ISAs Changes so that
 InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have
 to do with handling misspeculated branches at different points in pipeline

---
 src/cpu/o3/thread_context.hh | 3 ---
 1 file changed, 3 deletions(-)

(limited to 'src/cpu/o3')

diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index e7c9c3b8f..b10305d5d 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -265,9 +265,6 @@ class O3ThreadContext : public ThreadContext
 
     virtual void setNextNPC(uint64_t val)
     {
-#if THE_ISA == ALPHA_ISA
-        panic("Not supported on Alpha!");
-#endif
         this->cpu->setNextNPC(val, this->thread->threadId());
     }
 };
-- 
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