From d55b25cde6d2c072885a2c468d209fb18d6628e6 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 6 Mar 2007 11:13:43 -0800 Subject: Move all of the parameters of the Root SimObject so they are directly configured by python. Move stuff from root.(cc|hh) to core.(cc|hh) since it really belogs there now. In the process, simplify how ticks are used in the python code. --HG-- extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3 --- src/cpu/o3/cpu.cc | 2 +- src/cpu/o3/fetch_impl.hh | 2 +- src/cpu/o3/inst_queue_impl.hh | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/cpu/o3') diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 66c75a12d..785165636 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -45,7 +45,7 @@ #include "cpu/o3/isa_specific.hh" #include "cpu/o3/cpu.hh" -#include "sim/root.hh" +#include "sim/core.hh" #include "sim/stat_control.hh" #if USE_CHECKER diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index e6a779823..ac0149d18 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -40,7 +40,7 @@ #include "mem/request.hh" #include "sim/byteswap.hh" #include "sim/host.hh" -#include "sim/root.hh" +#include "sim/core.hh" #if FULL_SYSTEM #include "arch/tlb.hh" diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 98b8fa900..d5781d89d 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -32,7 +32,7 @@ #include #include -#include "sim/root.hh" +#include "sim/core.hh" #include "cpu/o3/fu_pool.hh" #include "cpu/o3/inst_queue.hh" -- cgit v1.2.3