From 3e5f4876630169e92b3ad736d747bcba1b79c062 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 19 Apr 2009 04:25:01 -0700
Subject: Memory: Rename LOCKED for load locked store conditional to LLSC.

---
 src/cpu/ozone/back_end_impl.hh    | 2 +-
 src/cpu/ozone/inorder_back_end.hh | 2 +-
 src/cpu/ozone/lsq_unit_impl.hh    | 6 +++---
 src/cpu/ozone/lw_lsq.hh           | 4 ++--
 src/cpu/ozone/lw_lsq_impl.hh      | 8 ++++----
 5 files changed, 11 insertions(+), 11 deletions(-)

(limited to 'src/cpu/ozone')

diff --git a/src/cpu/ozone/back_end_impl.hh b/src/cpu/ozone/back_end_impl.hh
index 415407c52..ef3b0f182 100644
--- a/src/cpu/ozone/back_end_impl.hh
+++ b/src/cpu/ozone/back_end_impl.hh
@@ -1256,7 +1256,7 @@ BackEnd<Impl>::executeInsts()
 
 //                ++iewExecStoreInsts;
 
-                if (!(inst->req->isLocked())) {
+                if (!(inst->req->isLlsc())) {
                     inst->setExecuted();
 
                     instToCommit(inst);
diff --git a/src/cpu/ozone/inorder_back_end.hh b/src/cpu/ozone/inorder_back_end.hh
index e930144be..b30b37a22 100644
--- a/src/cpu/ozone/inorder_back_end.hh
+++ b/src/cpu/ozone/inorder_back_end.hh
@@ -381,7 +381,7 @@ InorderBackEnd<Impl>::write(MemReqPtr &req, T &data, int store_idx)
         }
     }
 /*
-    if (req->isLocked()) {
+    if (req->isLlsc()) {
         if (req->isUncacheable()) {
             // Don't update result register (see stq_c in isa_desc)
             req->result = 2;
diff --git a/src/cpu/ozone/lsq_unit_impl.hh b/src/cpu/ozone/lsq_unit_impl.hh
index c24410520..7e7bbdb01 100644
--- a/src/cpu/ozone/lsq_unit_impl.hh
+++ b/src/cpu/ozone/lsq_unit_impl.hh
@@ -577,7 +577,7 @@ OzoneLSQ<Impl>::writebackStores()
             MemAccessResult result = dcacheInterface->access(req);
 
             //@todo temp fix for LL/SC (works fine for 1 CPU)
-            if (req->isLocked()) {
+            if (req->isLlsc()) {
                 req->result=1;
                 panic("LL/SC! oh no no support!!!");
             }
@@ -596,7 +596,7 @@ OzoneLSQ<Impl>::writebackStores()
                 Event *wb = NULL;
 /*
                 typename IEW::LdWritebackEvent *wb = NULL;
-                if (req->isLocked()) {
+                if (req->isLlsc()) {
                     // Stx_C does not generate a system port transaction.
                     req->result=0;
                     wb = new typename IEW::LdWritebackEvent(storeQueue[storeWBIdx].inst,
@@ -630,7 +630,7 @@ OzoneLSQ<Impl>::writebackStores()
 //                DPRINTF(Activity, "Active st accessing mem hit [sn:%lli]\n",
 //                        storeQueue[storeWBIdx].inst->seqNum);
 
-                if (req->isLocked()) {
+                if (req->isLlsc()) {
                     // Stx_C does not generate a system port transaction.
                     req->result=1;
                     typename BackEnd::LdWritebackEvent *wb =
diff --git a/src/cpu/ozone/lw_lsq.hh b/src/cpu/ozone/lw_lsq.hh
index 4f8101bc0..3ad8d1d64 100644
--- a/src/cpu/ozone/lw_lsq.hh
+++ b/src/cpu/ozone/lw_lsq.hh
@@ -635,7 +635,7 @@ OzoneLWLSQ<Impl>::read(RequestPtr req, T &data, int load_idx)
 
     PacketPtr data_pkt =
         new Packet(req,
-                   (req->isLocked() ?
+                   (req->isLlsc() ?
                     MemCmd::LoadLockedReq : Packet::ReadReq),
                    Packet::Broadcast);
     data_pkt->dataStatic(inst->memData);
@@ -662,7 +662,7 @@ OzoneLWLSQ<Impl>::read(RequestPtr req, T &data, int load_idx)
         return NoFault;
     }
 
-    if (req->isLocked()) {
+    if (req->isLlsc()) {
         cpu->lockFlag = true;
     }
 
diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh
index 00e52e039..3943dab2d 100644
--- a/src/cpu/ozone/lw_lsq_impl.hh
+++ b/src/cpu/ozone/lw_lsq_impl.hh
@@ -589,7 +589,7 @@ OzoneLWLSQ<Impl>::writebackStores()
 
         MemCmd command =
             req->isSwap() ? MemCmd::SwapReq :
-            (req->isLocked() ? MemCmd::WriteReq : MemCmd::StoreCondReq);
+            (req->isLlsc() ? MemCmd::WriteReq : MemCmd::StoreCondReq);
         PacketPtr data_pkt = new Packet(req, command, Packet::Broadcast);
         data_pkt->dataStatic(inst->memData);
 
@@ -606,7 +606,7 @@ OzoneLWLSQ<Impl>::writebackStores()
                 inst->seqNum);
 
         // @todo: Remove this SC hack once the memory system handles it.
-        if (req->isLocked()) {
+        if (req->isLlsc()) {
             if (req->isUncacheable()) {
                 req->setExtraData(2);
             } else {
@@ -664,7 +664,7 @@ OzoneLWLSQ<Impl>::writebackStores()
             if (result != MA_HIT && dcacheInterface->doEvents()) {
                 store_event->miss = true;
                 typename BackEnd::LdWritebackEvent *wb = NULL;
-                if (req->isLocked()) {
+                if (req->isLlsc()) {
                     wb = new typename BackEnd::LdWritebackEvent(inst,
                                                             be);
                     store_event->wbEvent = wb;
@@ -691,7 +691,7 @@ OzoneLWLSQ<Impl>::writebackStores()
 //                DPRINTF(Activity, "Active st accessing mem hit [sn:%lli]\n",
 //                        inst->seqNum);
 
-                if (req->isLocked()) {
+                if (req->isLlsc()) {
                     // Stx_C does not generate a system port
                     // transaction in the 21264, but that might be
                     // hard to accomplish in this model.
-- 
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