From 6bed6e0352a68723ea55017b3e09a8c279af11ec Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 24 Jan 2014 15:29:30 -0600 Subject: cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped. This patch add support for generating wake-up events in the CPU when an address that is currently in the exclusive state is hit by a snoop. This mechanism is required for ARMv8 multi-processor support. --- src/cpu/simple/atomic.hh | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) (limited to 'src/cpu/simple/atomic.hh') diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 7366213f8..7426139e7 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -147,17 +147,12 @@ class AtomicSimpleCPU : public BaseSimpleCPU public: - AtomicCPUPort(const std::string &_name, BaseCPU* _cpu) + AtomicCPUPort(const std::string &_name, BaseSimpleCPU* _cpu) : MasterPort(_name, _cpu) { } protected: - - virtual Tick recvAtomicSnoop(PacketPtr pkt) - { - // Snooping a coherence request, just return - return 0; - } + virtual Tick recvAtomicSnoop(PacketPtr pkt) { return 0; } bool recvTimingResp(PacketPtr pkt) { @@ -172,8 +167,30 @@ class AtomicSimpleCPU : public BaseSimpleCPU }; + class AtomicCPUDPort : public AtomicCPUPort + { + + public: + + AtomicCPUDPort(const std::string &_name, BaseSimpleCPU* _cpu) + : AtomicCPUPort(_name, _cpu), cpu(_cpu) + { + cacheBlockMask = ~(cpu->cacheLineSize() - 1); + } + + bool isSnooping() const { return true; } + + Addr cacheBlockMask; + protected: + BaseSimpleCPU *cpu; + + virtual Tick recvAtomicSnoop(PacketPtr pkt); + virtual void recvFunctionalSnoop(PacketPtr pkt); + }; + + AtomicCPUPort icachePort; - AtomicCPUPort dcachePort; + AtomicCPUDPort dcachePort; bool fastmem; Request ifetch_req; -- cgit v1.2.3