From e9c04dad60f7a382fe94ca587fa505926dbd925c Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Mon, 2 Jul 2007 09:26:36 -0700 Subject: Fix a couple LL/SC bugs that only affected timing mode. src/cpu/simple/timing.cc: Fix swap/stq_c command bug. src/mem/packet.cc: Fix incorrect LoadLockedReq command response field. --HG-- extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5 --- src/cpu/simple/timing.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/simple/timing.cc') diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 77df2c05d..492a669b8 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -370,7 +370,7 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) } if (do_access) { - dcache_pkt = new Packet(req, MemCmd::WriteReq, Packet::Broadcast); + dcache_pkt = new Packet(req, cmd, Packet::Broadcast); dcache_pkt->allocate(); dcache_pkt->set(data); -- cgit v1.2.3