From 043709fdfab3b6c46f6ef95d1f642cd3c06ee20a Mon Sep 17 00:00:00 2001
From: Geoffrey Blake <geoffrey.blake@arm.com>
Date: Fri, 9 Mar 2012 09:59:27 -0500
Subject: CheckerCPU: Make CheckerCPU runtime selectable instead of compile
 selectable

Enables the CheckerCPU to be selected at runtime with the --checker option
from the configs/example/fs.py and configs/example/se.py configuration
files.  Also merges with the SE/FS changes.
---
 src/cpu/simple/BaseSimpleCPU.py | 18 +++++++++++-------
 src/cpu/simple/base.cc          | 10 ++--------
 src/cpu/simple/base.hh          |  9 ++-------
 3 files changed, 15 insertions(+), 22 deletions(-)

(limited to 'src/cpu/simple')

diff --git a/src/cpu/simple/BaseSimpleCPU.py b/src/cpu/simple/BaseSimpleCPU.py
index ea2c642e6..d9b963890 100644
--- a/src/cpu/simple/BaseSimpleCPU.py
+++ b/src/cpu/simple/BaseSimpleCPU.py
@@ -29,15 +29,19 @@
 from m5.defines import buildEnv
 from m5.params import *
 from BaseCPU import BaseCPU
-
-if buildEnv['USE_CHECKER']:
-    from DummyChecker import DummyChecker
+from DummyChecker import DummyChecker
 
 class BaseSimpleCPU(BaseCPU):
     type = 'BaseSimpleCPU'
     abstract = True
 
-    if buildEnv['USE_CHECKER']:
-        checker = Param.BaseCPU(DummyChecker(), "checker")
-        checker.itb = BaseCPU.itb
-        checker.dtb = BaseCPU.dtb
+    def addCheckerCpu(self):
+        if buildEnv['TARGET_ISA'] in ['arm']:
+            from ArmTLB import ArmTLB
+
+            self.checker = DummyChecker(workload = self.workload)
+            self.checker.itb = ArmTLB(size = self.itb.size)
+            self.checker.dtb = ArmTLB(size = self.dtb.size)
+        else:
+            print "ERROR: Checker only supported under ARM ISA!"
+            exit(1)
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index eee28876d..a5951035e 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -55,9 +55,10 @@
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"
-#include "config/use_checker.hh"
 #include "cpu/simple/base.hh"
 #include "cpu/base.hh"
+#include "cpu/checker/cpu.hh"
+#include "cpu/checker/thread_context.hh"
 #include "cpu/exetrace.hh"
 #include "cpu/profile.hh"
 #include "cpu/simple_thread.hh"
@@ -80,11 +81,6 @@
 #include "sim/stats.hh"
 #include "sim/system.hh"
 
-#if USE_CHECKER
-#include "cpu/checker/cpu.hh"
-#include "cpu/checker/thread_context.hh"
-#endif
-
 using namespace std;
 using namespace TheISA;
 
@@ -101,7 +97,6 @@ BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p)
 
     tc = thread->getTC();
 
-#if USE_CHECKER
     if (p->checker) {
         BaseCPU *temp_checker = p->checker;
         checker = dynamic_cast<CheckerCPU *>(temp_checker);
@@ -112,7 +107,6 @@ BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p)
     } else {
         checker = NULL;
     }
-#endif
 
     numInst = 0;
     startNumInst = 0;
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 4b73a4519..67fbccf98 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -48,8 +48,8 @@
 #include "arch/predecoder.hh"
 #include "base/statistics.hh"
 #include "config/the_isa.hh"
-#include "config/use_checker.hh"
 #include "cpu/base.hh"
+#include "cpu/checker/cpu.hh"
 #include "cpu/decode.hh"
 #include "cpu/pc_event.hh"
 #include "cpu/simple_thread.hh"
@@ -61,10 +61,6 @@
 #include "sim/full_system.hh"
 #include "sim/system.hh"
 
-#if USE_CHECKER
-#include "cpu/checker/cpu.hh"
-#endif
-
 // forward declarations
 class Checkpoint;
 class Process;
@@ -128,9 +124,8 @@ class BaseSimpleCPU : public BaseCPU
      */
     ThreadContext *tc;
 
-#if USE_CHECKER
     CheckerCPU *checker;
-#endif
+
   protected:
 
     enum Status {
-- 
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