From 9a8cb7db7e86c25a755f2e2817a0385b13e3ac32 Mon Sep 17 00:00:00 2001
From: Nathan Binkert <nate@binkert.org>
Date: Tue, 22 Sep 2009 15:24:16 -0700
Subject: python: Move more code into m5.util allow SCons to use that code. Get
rid of misc.py and just stick misc things in __init__.py Move utility
functions out of SCons files and into m5.util Move utility type stuff from
m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow
access only from m5.defines Rename AddToPath to addToPath while we're moving
it to m5.util Rename read_command to readCommand while we're moving it Rename
compare_versions to compareVersions while we're moving it.
--HG--
rename : src/python/m5/convert.py => src/python/m5/util/convert.py
rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
---
src/cpu/simple/AtomicSimpleCPU.py | 1 -
src/cpu/simple/TimingSimpleCPU.py | 1 -
2 files changed, 2 deletions(-)
(limited to 'src/cpu/simple')
diff --git a/src/cpu/simple/AtomicSimpleCPU.py b/src/cpu/simple/AtomicSimpleCPU.py
index b7174bb43..3d72f4098 100644
--- a/src/cpu/simple/AtomicSimpleCPU.py
+++ b/src/cpu/simple/AtomicSimpleCPU.py
@@ -27,7 +27,6 @@
# Authors: Nathan Binkert
from m5.params import *
-from m5 import build_env
from BaseSimpleCPU import BaseSimpleCPU
class AtomicSimpleCPU(BaseSimpleCPU):
diff --git a/src/cpu/simple/TimingSimpleCPU.py b/src/cpu/simple/TimingSimpleCPU.py
index ce6839241..6b83c41aa 100644
--- a/src/cpu/simple/TimingSimpleCPU.py
+++ b/src/cpu/simple/TimingSimpleCPU.py
@@ -27,7 +27,6 @@
# Authors: Nathan Binkert
from m5.params import *
-from m5 import build_env
from BaseSimpleCPU import BaseSimpleCPU
class TimingSimpleCPU(BaseSimpleCPU):
--
cgit v1.2.3
From d9f39c8ce75aac84c88b32392c2967344362906b Mon Sep 17 00:00:00 2001
From: Nathan Binkert <nate@binkert.org>
Date: Wed, 23 Sep 2009 08:34:21 -0700
Subject: arch: nuke arch/isa_specific.hh and move stuff to generated
config/the_isa.hh
---
src/cpu/simple/atomic.cc | 1 +
src/cpu/simple/base.cc | 1 +
src/cpu/simple/base.hh | 1 +
src/cpu/simple/timing.cc | 1 +
4 files changed, 4 insertions(+)
(limited to 'src/cpu/simple')
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 83da618f8..cd4f5457e 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -32,6 +32,7 @@
#include "arch/mmaped_ipr.hh"
#include "arch/utility.hh"
#include "base/bigint.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/simple/atomic.hh"
#include "mem/packet.hh"
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 732bb637b..0104e1b1f 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -40,6 +40,7 @@
#include "base/stats/events.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "cpu/profile.hh"
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 466d0d1c9..39961fb88 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -36,6 +36,7 @@
#include "arch/predecoder.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/pc_event.hh"
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 672fd9414..8d3bae3f6 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -32,6 +32,7 @@
#include "arch/mmaped_ipr.hh"
#include "arch/utility.hh"
#include "base/bigint.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/simple/timing.hh"
#include "mem/packet.hh"
--
cgit v1.2.3
From b8120f6c38f212acbfd246a3081842a9e3d06eb3 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 10 Nov 2009 21:10:18 -0800
Subject: Mem: Eliminate the NO_FAULT request flag.
---
src/cpu/simple/atomic.cc | 16 +++++++++++++---
src/cpu/simple/timing.cc | 8 ++++++++
2 files changed, 21 insertions(+), 3 deletions(-)
(limited to 'src/cpu/simple')
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index cd4f5457e..c092b5b1f 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -353,8 +353,14 @@ AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags)
recordEvent("Uncached Read");
//If there's a fault, return it
- if (fault != NoFault)
- return fault;
+ if (fault != NoFault) {
+ if (req->isPrefetch()) {
+ return NoFault;
+ } else {
+ return fault;
+ }
+ }
+
//If we don't need to access a second cache line, stop now.
if (secondAddr <= addr)
{
@@ -531,7 +537,11 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
assert(locked);
locked = false;
}
- return fault;
+ if (fault != NoFault && req->isPrefetch()) {
+ return NoFault;
+ } else {
+ return fault;
+ }
}
/*
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 8d3bae3f6..6b22d2fcf 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -273,6 +273,8 @@ TimingSimpleCPU::sendData(Fault fault, RequestPtr req,
{
_status = Running;
if (fault != NoFault) {
+ if (req->isPrefetch())
+ fault = NoFault;
delete data;
delete req;
@@ -315,6 +317,10 @@ TimingSimpleCPU::sendSplitData(Fault fault1, Fault fault2,
{
_status = Running;
if (fault1 != NoFault || fault2 != NoFault) {
+ if (req1->isPrefetch())
+ fault1 = NoFault;
+ if (req2->isPrefetch())
+ fault2 = NoFault;
delete data;
delete req1;
delete req2;
@@ -360,6 +366,8 @@ TimingSimpleCPU::sendSplitData(Fault fault1, Fault fault2,
void
TimingSimpleCPU::translationFault(Fault fault)
{
+ // fault may be NoFault in cases where a fault is suppressed,
+ // for instance prefetches.
numCycles += tickToCycles(curTick - previousTick);
previousTick = curTick;
--
cgit v1.2.3
From b5d2052fa0b7c62372e1b936f2654f700e831b68 Mon Sep 17 00:00:00 2001
From: Brad Beckmann <Brad.Beckmann@amd.com>
Date: Wed, 18 Nov 2009 13:55:58 -0800
Subject: m5: Fixed bug in atomic cpu destructor
---
src/cpu/simple/atomic.cc | 3 +++
1 file changed, 3 insertions(+)
(limited to 'src/cpu/simple')
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index c092b5b1f..05b4ca3e2 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -171,6 +171,9 @@ AtomicSimpleCPU::AtomicSimpleCPU(AtomicSimpleCPUParams *p)
AtomicSimpleCPU::~AtomicSimpleCPU()
{
+ if (tickEvent.scheduled()) {
+ deschedule(tickEvent);
+ }
}
void
--
cgit v1.2.3