From da6a7b1263cf624790f06a5f944366fb113dffc8 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <stever@eecs.umich.edu>
Date: Fri, 26 May 2006 13:48:35 -0400
Subject: Add names to memory Port objects for tracing.

--HG--
extra : convert_revision : ddf30084e343e8656e4812ab20356292b35507ee
---
 src/cpu/simple/atomic.cc | 2 +-
 src/cpu/simple/atomic.hh | 4 ++--
 src/cpu/simple/timing.hh | 8 ++++----
 3 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'src/cpu/simple')

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index e9422b9c0..04a84c92a 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -117,7 +117,7 @@ AtomicSimpleCPU::CpuPort::recvRetry()
 AtomicSimpleCPU::AtomicSimpleCPU(Params *p)
     : BaseSimpleCPU(p), tickEvent(this),
       width(p->width), simulate_stalls(p->simulate_stalls),
-      icachePort(this), dcachePort(this)
+      icachePort(name() + "-iport", this), dcachePort(name() + "-iport", this)
 {
     _status = Idle;
 
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index d0ba085f0..ab3a3e8ef 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -84,8 +84,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU
 
       public:
 
-        CpuPort(AtomicSimpleCPU *_cpu)
-            : cpu(_cpu)
+        CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu)
+            : Port(_name), cpu(_cpu)
         { }
 
       protected:
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 83be025d9..7f38e629a 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -71,8 +71,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
 
       public:
 
-        CpuPort(TimingSimpleCPU *_cpu)
-            : cpu(_cpu)
+        CpuPort(const std::string &_name, TimingSimpleCPU *_cpu)
+            : Port(_name), cpu(_cpu)
         { }
 
       protected:
@@ -93,7 +93,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
       public:
 
         IcachePort(TimingSimpleCPU *_cpu)
-            : CpuPort(_cpu)
+            : CpuPort(_cpu->name() + "-iport", _cpu)
         { }
 
       protected:
@@ -108,7 +108,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
       public:
 
         DcachePort(TimingSimpleCPU *_cpu)
-            : CpuPort(_cpu)
+            : CpuPort(_cpu->name() + "-dport", _cpu)
         { }
 
       protected:
-- 
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