From de21bb93ea4312a7e958698c634b16b10e02e21a Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Fri, 18 Nov 2011 01:33:28 -0800
Subject: SE/FS: Get rid of FULL_SYSTEM in the CPU directory.

---
 src/cpu/simple/atomic.cc |  4 ----
 src/cpu/simple/base.cc   | 12 ++++++------
 src/cpu/simple/timing.cc |  4 ----
 3 files changed, 6 insertions(+), 14 deletions(-)

(limited to 'src/cpu/simple')

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 9995ed55e..fed94ffd8 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -87,11 +87,9 @@ AtomicSimpleCPU::init()
     if (FullSystem) {
         ThreadID size = threadContexts.size();
         for (ThreadID i = 0; i < size; ++i) {
-#if FULL_SYSTEM
             ThreadContext *tc = threadContexts[i];
             // initialize CPU, including PC
             TheISA::initCPU(tc, tc->contextId());
-#endif
         }
     }
     if (hasPhysMemPort) {
@@ -618,9 +616,7 @@ AtomicSimpleCPU *
 AtomicSimpleCPUParams::create()
 {
     numThreads = 1;
-#if !FULL_SYSTEM
     if (!FullSystem && workload.size() != 1)
         panic("only one workload allowed");
-#endif
     return new AtomicSimpleCPU(this);
 }
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index e4940a55f..610cc6b89 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -73,6 +73,7 @@
 #include "params/BaseSimpleCPU.hh"
 #include "sim/byteswap.hh"
 #include "sim/debug.hh"
+#include "sim/full_system.hh"
 #include "sim/sim_events.hh"
 #include "sim/sim_object.hh"
 #include "sim/stats.hh"
@@ -84,12 +85,11 @@ using namespace TheISA;
 BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p)
     : BaseCPU(p), traceData(NULL), thread(NULL), predecoder(NULL)
 {
-#if FULL_SYSTEM
-    thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
-#else
-    thread = new SimpleThread(this, /* thread_num */ 0, p->workload[0],
-            p->itb, p->dtb);
-#endif // !FULL_SYSTEM
+    if (FullSystem)
+        thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
+    else
+        thread = new SimpleThread(this, /* thread_num */ 0, p->workload[0],
+                p->itb, p->dtb);
 
     thread->setStatus(ThreadContext::Halted);
 
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index cd640da31..983672c27 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -77,11 +77,9 @@ TimingSimpleCPU::init()
     BaseCPU::init();
     if (FullSystem) {
         for (int i = 0; i < threadContexts.size(); ++i) {
-#if FULL_SYSTEM
             ThreadContext *tc = threadContexts[i];
             // initialize CPU, including PC
             TheISA::initCPU(tc, _cpuId);
-#endif
         }
     }
 }
@@ -1009,9 +1007,7 @@ TimingSimpleCPU *
 TimingSimpleCPUParams::create()
 {
     numThreads = 1;
-#if !FULL_SYSTEM
     if (!FullSystem && workload.size() != 1)
         panic("only one workload allowed");
-#endif
     return new TimingSimpleCPU(this);
 }
-- 
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