From 753adb38d5471d23315d1bcfc6a744d1c6e03975 Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Fri, 22 Jun 2007 19:03:42 -0400 Subject: mips import pt. 1 src/arch/mips/SConscript: "mips import pt.1". --HG-- extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1 --- src/cpu/simple_thread.hh | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/cpu/simple_thread.hh') diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 95848ee2c..c20fe3d90 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -349,22 +349,22 @@ class SimpleThread : public ThreadState regs.setNextNPC(val); } - MiscReg readMiscRegNoEffect(int misc_reg) + MiscReg readMiscRegNoEffect(int misc_reg, unsigned tid = 0) { return regs.readMiscRegNoEffect(misc_reg); } - MiscReg readMiscReg(int misc_reg) + MiscReg readMiscReg(int misc_reg, unsigned tid = 0) { return regs.readMiscReg(misc_reg, tc); } - void setMiscRegNoEffect(int misc_reg, const MiscReg &val) + void setMiscRegNoEffect(int misc_reg, const MiscReg &val, unsigned tid = 0) { return regs.setMiscRegNoEffect(misc_reg, val); } - void setMiscReg(int misc_reg, const MiscReg &val) + void setMiscReg(int misc_reg, const MiscReg &val, unsigned tid = 0) { return regs.setMiscReg(misc_reg, val, tc); } -- cgit v1.2.3