From 2c293823aa7cb6d2cac4c0ff35e2023ff132a8f2 Mon Sep 17 00:00:00 2001 From: Yasuko Eckert Date: Tue, 15 Oct 2013 14:22:44 -0400 Subject: cpu: add a condition-code register class Add a third register class for condition codes, in parallel with the integer and FP classes. No ISAs use the CC class at this point though. --- src/cpu/static_inst.hh | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/cpu/static_inst.hh') diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index 0464eda14..66f254e34 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -1,5 +1,6 @@ /* * Copyright (c) 2003-2005 The Regents of The University of Michigan + * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -110,6 +111,7 @@ class StaticInst : public RefCounted IsInteger, ///< References integer regs. IsFloating, ///< References FP regs. + IsCC, ///< References CC regs. IsMemRef, ///< References memory (load, store, or prefetch). IsLoad, ///< Reads from memory (load or prefetch). @@ -181,6 +183,7 @@ class StaticInst : public RefCounted //@{ int8_t _numFPDestRegs; int8_t _numIntDestRegs; + int8_t _numCCDestRegs; //@} public: @@ -220,6 +223,7 @@ class StaticInst : public RefCounted bool isInteger() const { return flags[IsInteger]; } bool isFloating() const { return flags[IsFloating]; } + bool isCC() const { return flags[IsCC]; } bool isControl() const { return flags[IsControl]; } bool isCall() const { return flags[IsCall]; } -- cgit v1.2.3