From 2d0a66cbc123fc345deb070c323130382518f367 Mon Sep 17 00:00:00 2001
From: Korey Sewell <ksewell@umich.edu>
Date: Tue, 10 Feb 2009 15:49:29 -0800
Subject: CPU: Prepare CPU models for the new in-order CPU model. Some new
 functions and forward declarations are necessary to make things work

---
 src/cpu/static_inst.hh | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

(limited to 'src/cpu/static_inst.hh')

diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 032a304ad..f28b53ccf 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -56,9 +56,8 @@ class Packet;
 class O3CPUImpl;
 template <class Impl> class BaseO3DynInst;
 typedef BaseO3DynInst<O3CPUImpl> O3DynInst;
-
-template <class Impl>
-class OzoneDynInst;
+template <class Impl> class OzoneDynInst;
+class InOrderDynInst;
 
 class CheckerCPU;
 class FastCPU;
@@ -434,6 +433,12 @@ class StaticInst : public StaticInstBase
      */
     bool hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const;
 
+    virtual Request::Flags memAccFlags()
+    {
+        panic("StaticInst::memAccFlags called on non-memory instruction");
+        return 0;
+    };
+
     /**
      * Return string representation of disassembled instruction.
      * The default version of this function will call the internal
-- 
cgit v1.2.3