From d3d24835bcc03ecf312ac6ba7df114656770730f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 7 Mar 2019 03:02:35 -0800 Subject: arch, cpu, dev, gpu, mem, sim, python: start using getPort. Replace the getMasterPort, getSlavePort, and getEthPort functions with getPort, and remove extraneous mechanisms that are no longer necessary. Change-Id: Iab7e3c02d2f3a0cf33e7e824e18c28646b5bc318 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17040 Reviewed-by: Daniel Carvalho Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- src/cpu/testers/rubytest/RubyTester.cc | 12 ++++++------ src/cpu/testers/rubytest/RubyTester.hh | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'src/cpu/testers/rubytest') diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc index 93754467d..cb23688c4 100644 --- a/src/cpu/testers/rubytest/RubyTester.cc +++ b/src/cpu/testers/rubytest/RubyTester.cc @@ -128,17 +128,17 @@ RubyTester::init() m_checkTable_ptr = new CheckTable(m_num_writers, m_num_readers, this); } -BaseMasterPort & -RubyTester::getMasterPort(const std::string &if_name, PortID idx) +Port & +RubyTester::getPort(const std::string &if_name, PortID idx) { if (if_name != "cpuInstPort" && if_name != "cpuInstDataPort" && if_name != "cpuDataPort") { // pass it along to our super class - return MemObject::getMasterPort(if_name, idx); + return MemObject::getPort(if_name, idx); } else { if (if_name == "cpuInstPort") { if (idx > m_num_inst_only_ports) { - panic("RubyTester::getMasterPort: unknown inst port %d\n", + panic("RubyTester::getPort: unknown inst port %d\n", idx); } // @@ -147,7 +147,7 @@ RubyTester::getMasterPort(const std::string &if_name, PortID idx) return *readPorts[idx]; } else if (if_name == "cpuInstDataPort") { if (idx > m_num_inst_data_ports) { - panic("RubyTester::getMasterPort: unknown inst+data port %d\n", + panic("RubyTester::getPort: unknown inst+data port %d\n", idx); } int read_idx = idx + m_num_inst_only_ports; @@ -162,7 +162,7 @@ RubyTester::getMasterPort(const std::string &if_name, PortID idx) // if (idx > (static_cast(readPorts.size()) - (m_num_inst_only_ports + m_num_inst_data_ports))) { - panic("RubyTester::getMasterPort: unknown data port %d\n", + panic("RubyTester::getPort: unknown data port %d\n", idx); } int read_idx = idx + m_num_inst_only_ports + m_num_inst_data_ports; diff --git a/src/cpu/testers/rubytest/RubyTester.hh b/src/cpu/testers/rubytest/RubyTester.hh index 007035977..2509aa2cd 100644 --- a/src/cpu/testers/rubytest/RubyTester.hh +++ b/src/cpu/testers/rubytest/RubyTester.hh @@ -94,8 +94,8 @@ class RubyTester : public MemObject RubyTester(const Params *p); ~RubyTester(); - virtual BaseMasterPort &getMasterPort(const std::string &if_name, - PortID idx = InvalidPortID); + Port &getPort(const std::string &if_name, + PortID idx=InvalidPortID) override; bool isInstOnlyCpuPort(int idx); bool isInstDataCpuPort(int idx); -- cgit v1.2.3