From d325f49b70e52044fd1072afed27227ecd4b2a60 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 28 Sep 2007 13:21:52 -0400 Subject: Rename cycles() function to ticks() --HG-- extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5 --- src/cpu/trace/trace_cpu.cc | 4 ++-- src/cpu/trace/trace_cpu.hh | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/cpu/trace') diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc index e5739b2ce..d3cf34e9d 100644 --- a/src/cpu/trace/trace_cpu.cc +++ b/src/cpu/trace/trace_cpu.cc @@ -110,10 +110,10 @@ TraceCPU::tick() if (mainEventQueue.empty()) { exitSimLoop("end of memory trace reached"); } else { - tickEvent.schedule(mainEventQueue.nextEventTime() + cycles(1)); + tickEvent.schedule(mainEventQueue.nextEventTime() + ticks(1)); } } else { - tickEvent.schedule(max(curTick + cycles(1), nextCycle)); + tickEvent.schedule(max(curTick + ticks(1), nextCycle)); } } diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh index 9c96d71d5..b88c7072e 100644 --- a/src/cpu/trace/trace_cpu.hh +++ b/src/cpu/trace/trace_cpu.hh @@ -107,7 +107,7 @@ class TraceCPU : public SimObject MemInterface *dcache_interface, MemTraceReader *data_trace); - inline Tick cycles(int numCycles) { return numCycles; } + inline Tick ticks(int numCycles) { return numCycles; } /** * Perform all the accesses for one cycle. -- cgit v1.2.3