From 05bd3eb4ec3d9fea3dbc46112a47459085d3011c Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:16 -0500
Subject: ARM: Implement support for the IT instruction and the ITSTATE bits of
 CPSR.

---
 src/cpu/simple/base.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/cpu')

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 7a063d9d7..713ffd081 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -357,10 +357,10 @@ BaseSimpleCPU::checkForInterrupts()
         Fault interrupt = interrupts->getInterrupt(tc);
 
         if (interrupt != NoFault) {
-            predecoder.reset();
             fetchOffset = 0;
             interrupts->updateIntrInfo(tc);
             interrupt->invoke(tc);
+            predecoder.reset();
         }
     }
 #endif
@@ -508,8 +508,8 @@ BaseSimpleCPU::advancePC(Fault fault)
     fetchOffset = 0;
     if (fault != NoFault) {
         curMacroStaticInst = StaticInst::nullStaticInstPtr;
-        predecoder.reset();
         fault->invoke(tc);
+        predecoder.reset();
     } else {
         //If we're at the last micro op for this instruction
         if (curStaticInst && curStaticInst->isLastMicroop()) {
-- 
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