From 0c99d21ad748371e801508a8c3652e07e2e56f93 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Tue, 25 Sep 2012 11:49:40 -0500
Subject: ARM: Squash outstanding walks when instructions are squashed.

---
 src/cpu/simple/timing.hh | 8 ++++++++
 src/cpu/translation.hh   | 6 ++++++
 2 files changed, 14 insertions(+)

(limited to 'src/cpu')

diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 19a4f818e..a2570abe6 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -269,6 +269,14 @@ class TimingSimpleCPU : public BaseSimpleCPU
     void completeDataAccess(PacketPtr pkt);
     void advanceInst(Fault fault);
 
+    /** This function is used by the page table walker to determine if it could
+     * translate the a pending request or if the underlying request has been
+     * squashed. This always returns false for the simple timing CPU as it never
+     * executes any instructions speculatively.
+     * @ return Is the current instruction squashed?
+     */
+    bool isSquashed() const { return false; }
+
     /**
      * Print state of address in memory system via PrintReq (for
      * debugging).
diff --git a/src/cpu/translation.hh b/src/cpu/translation.hh
index b6bc2182c..90fffa03d 100644
--- a/src/cpu/translation.hh
+++ b/src/cpu/translation.hh
@@ -259,6 +259,12 @@ class DataTranslation : public BaseTLB::Translation
         }
         delete this;
     }
+
+    bool
+    squashed() const
+    {
+        return xc->isSquashed();
+    }
 };
 
 #endif // __CPU_TRANSLATION_HH__
-- 
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