From 557bde43c331024eb5cecf4093a24a5b7a9cc266 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 12 Oct 2008 13:28:54 -0700
Subject: X86: Make APICs communicate through the memory system.

---
 src/cpu/BaseCPU.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/cpu')

diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 78b9ae944..51d447f0b 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -144,7 +144,8 @@ class BaseCPU(MemObject):
     if build_env['TARGET_ISA'] == 'x86' and build_env['FULL_SYSTEM']:
         _mem_ports = ["itb.walker.port",
                       "dtb.walker.port",
-                      "interrupts.pio"]
+                      "interrupts.pio",
+                      "interrupts.int_port"]
 
     def connectMemPorts(self, bus):
         for p in self._mem_ports:
-- 
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