From aef4a9904e0324b2aba2ddc212768d5b0c72b566 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Thu, 30 Sep 2010 09:35:19 -0500
Subject: CPU/Cache: Fix some errors exposed by valgrind

---
 src/cpu/simple/timing.cc | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/cpu')

diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 7b45822d6..2eb5b432b 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -274,7 +274,7 @@ TimingSimpleCPU::sendData(RequestPtr req, uint8_t *data, uint64_t *res,
 {
     PacketPtr pkt;
     buildPacket(pkt, req, read);
-    pkt->dataDynamic<uint8_t>(data);
+    pkt->dataDynamicArray<uint8_t>(data);
     if (req->getFlags().isSet(Request::NO_ACCESS)) {
         assert(!dcache_pkt);
         pkt->makeResponse();
@@ -402,7 +402,7 @@ TimingSimpleCPU::buildSplitPacket(PacketPtr &pkt1, PacketPtr &pkt2,
     PacketPtr pkt = new Packet(req, pkt1->cmd.responseCommand(),
                                Packet::Broadcast);
 
-    pkt->dataDynamic<uint8_t>(data);
+    pkt->dataDynamicArray<uint8_t>(data);
     pkt1->dataStatic<uint8_t>(data);
     pkt2->dataStatic<uint8_t>(data + req1->getSize());
 
@@ -602,7 +602,7 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
     if (traceData) {
         traceData->setData(data);
     }
-    T *dataP = new T;
+    T *dataP = (T*) new uint8_t[sizeof(T)];
     *dataP = TheISA::htog(data);
 
     return writeTheseBytes((uint8_t *)dataP, sizeof(T), addr, flags, res);
@@ -674,7 +674,7 @@ TimingSimpleCPU::finishTranslation(WholeTranslationState *state)
         if (state->isPrefetch()) {
             state->setNoFault();
         }
-        delete state->data;
+        delete [] state->data;
         state->deleteReqs();
         translationFault(state->getFault());
     } else {
-- 
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